H03M13/35

Transmitting/receiving system and broadcast signal processing method
09806851 · 2017-10-31 · ·

The invention relates to a transmitting system, comprising an SNS client that receives SNS messages from at least one SNS server, and a transmitter which transmits a broadcast signal, including the SNS messages and mobile service data, for a mobile broadcast. The transmitter includes: an RS frame encoder, which performs RS encoding and CRC encoding on the mobile service data for the mobile broadcast so as to build RS frames, and divides each RS frame into a plurality of portions; a group-forming unit, which forms data groups that contain each of the plurality of portions, and which adds known data sequences and signaling data to each data group; an inter-leaver for interleaving data of the data groups; and a trellis encoding unit for trellis-encoding the interleaved data.

Data processing device and data processing method

In a transmitting device, in interchanging to interchange a code bit of an LDPC code in which a code length is 16200 bits and an encoding rate is 7/15 with a symbol bit of a symbol corresponding to any of 8 signal points defined by 8PSK, when 3 bits of code bits stored in three units of storages having a storage capacity of 16200/3 bits and read bit by bit from the units of storages are allocated to one symbol, a bit b0, a bit b1, and a bit b2 are interchanged with a bit y1, a bit y0, and a bit y2, respectively. A position of the interchanged code bit obtained from data transmitted from the transmitting device is returned to an original position. The present technology is applicable to a case of transmitting data using an LDPC code, for example.

Parallel bit interleaver
11671118 · 2023-06-06 · ·

A bit interleaving method involves applying a bit permutation process to bits of a QC-LDPC codeword made up of N cyclic blocks each including Q bits, and dividing the codeword after the permutation process into a plurality of constellation words each including M bits, the codeword being divided into F×N′/M folding sections (N′ being a subset of N selected cyclic blocks and being a multiple of M/F), each of the constellation words being associated with one of the F×N′/M folding sections, and the bit permutation process being applied such that each of the constellation words includes F bits from each of M/F different cyclic blocks in a given folding section associated with a given constellation word.

Data processing device and data processing method

In a transmitting device, in interchanging to interchange a code bit of an LDPC code in which a code length is 16200 bits and an encoding rate is 8/15 with a symbol bit of a symbol corresponding to any of 8 signal points defined by 8PSK, when 3 bits of code bits stored in three units of storages having a storage capacity of 16200/3 bits and read bit by bit from the units of storages are allocated to one symbol, a bit b0, a bit b1, and a bit b2 are interchanged with a bit y1, a bit y0, and a bit y2, respectively. A position of the interchanged code bit obtained from data transmitted from the transmitting device is returned to an original position. The present technology is applicable to a case of transmitting data using an LDPC code, for example.

Storage systems with adaptive erasure code generation
09793927 · 2017-10-17 · ·

Apparatuses, methods and storage medium associated with generating erasure codes for data to be stored in a storage system. In embodiments, a method may include launching, by storage system, a plurality of instances of an erasure code generation module, based at least in part on hardware configuration of the storage system. Additionally, the method may further include setting, by the storage system, operational parameters of the plurality of instances of the erasure code generation module, based at least in part on current system load of the storage system. Further, the method may include operating, by the storage system, the plurality of instances of the erasure code generation module to generate erasure codes for data to be stored in the storage system, in accordance with the operational parameters set. Other embodiments may be described and claimed.

Method and apparatus for improving reliability of digital communications
11669378 · 2023-06-06 ·

A method and apparatus for improving the reliability of a digital communications system is provided. In accordance with at least one embodiment, power of a transmitted signal is controlled to improve reliability. In accordance with at least one embodiment, timing of a transmitted signal is controlled to improve reliability. In accordance with at least one embodiment, interference is detected. In accordance with at least one embodiment, interference is localized. In accordance with at least one embodiment, combinatorial processing is used to increase reliability. In accordance with at least one embodiment, gradual rekeying is performed. In accordance with at least one embodiment, confirmed stepwise progression rekeying is performed. In accordance with at least one embodiment, transmission detection is provided. In accordance with at least one embodiment, reporting of cryptographic mode utilization is provided.

Progressive length error control code
11256570 · 2022-02-22 · ·

Devices and methods may be used to append a scalable (1) of parity bits in a data packet that scales with a number of data bits in a payload of the data packet. The parity bits may be generated utilizing a table of entries. In some examples, each entry in the table corresponds to a number of the data bits to be included in the payload; and each column of the table may be used to generate a corresponding parity bit of the one or more parity bits.

Signal processing apparatus and signal processing method

A signal processing device includes a distributing unit and a plurality of correcting units with different processing performance, the distributing unit distributes a bit sequence having a first number of bits to the first correcting unit, and a bit sequence having a second number of bits less than the first number of bits to the second correcting unit having lower processing performance than the first correcting unit, the first correcting unit applies error correction processing to the bit sequence having the first number of bits distributed to the first correcting unit, and the second correcting unit applies error correction processing to the bit sequence having the second number of bits distributed to the second correcting unit.

Inter-facility network traffic optimization for redundancy coded data storage systems
09825652 · 2017-11-21 · ·

Techniques described and suggested herein include systems and methods for minimizing inter-facility data transfer during retrieval of data archives stored on data storage systems using redundancy coding techniques. For example, redundancy coded shards, which may include identity shards that contain unencoded original data of archives, may be configured such that a variable number of the shards can be leveraged to meet performance requirements or time-to-retrieval limitations for retrieval requests associated with the archives stored and/or encoded therein. Under some circumstances, implementing systems may monitor throughput rates, capabilities, and burdens, so as to preferentially retrieve data such that the identity shards are favored and fewer hosting data storage facilities are used for a given retrieval.

Controller having error correction function in accordance with operating state of monitoring target
09787330 · 2017-10-10 · ·

A controller has an error correction capability by including: a state monitoring unit that analyzes a state of a monitoring target and outputs state information; an error correction processing unit that switches error correction codes so that a correction rate for the respective states becomes a value within a predetermined range; and a correction rate calculation unit that calculates the correction rate for the respective states based on the correction result by the error correction processing unit.