H03M13/37

RFID RECEIVER AND METHOD OF EXTRACTING DATA BITS ENCODED IN A RADIO SIGNAL
20170372102 · 2017-12-28 ·

An RFID receiver (1) comprises an antenna (11) configured to receive a radio signal (20) from an RFID transmitter (2) and to generate an electrical signal (110) from the radio signal (20) received from the RFID transmitter (2). A decoder circuit (10) is connected to the antenna (11) and configured to extract from the electrical signal (110) generated by the antenna (11) data bits encoded in the electrical signal (110). The decoder circuit (10) comprises an analog-to-digital converter (12) connected directly to the antenna (11) and configured to generate a digital input signal (13) from the electrical signal (110) generated by the antenna (11). A bit extractor (14) is connected to the analog-to-digital converter (12) and configured to extract the data bits from the digital input (13) signal generated by the analog-to-digital converter (12).

APPARATUSES AND METHODS FOR ERASURE-ASSISTED ECC DECODING
20170373705 · 2017-12-28 ·

One example of erasure-assisted error correction code (ECC) decoding can include reading a codeword with a first trim level, reading the codeword with a second trim level, and reading the codeword with a third trim level. A first result from reading the codeword with the first trim level, a second result from reading the codeword with the second trim level, and a third result from reading the codeword with the third trim level can be accumulated. An erasure of a detected unit sequence can be computed. The detected unit sequence can be modified by changing a unit in a position of the detected unit sequence corresponding to a position of the erasure. The modified detected unit sequence can be ECC decoded.

Signal Correction Using Soft Information in a Data Channel

Example systems, read channel circuits, data storage devices, and methods to provide signal correction based on soft information in a read channel are described. The read channel circuit includes a soft output detector, such as a soft output Viterbi algorithm (SOVA) detector, and a signal correction circuit. The soft output detector passes detected data bits and corresponding soft information to the signal correction circuit. The signal correction circuit uses the soft information to determine a signal correction value, which is combined with input signal to return a corrected signal to the soft output detector for a next iteration. In some configurations, the signal correction value may compensate for DC offset, AC coupling poles, and/or signal asymmetries to reduce baseline wander in the read channel.

Generating a balanced codeword protected by an error correction code

Methods, systems, and devices for generating a balanced codeword protected by an error correction code are described. A memory device may receive data bits for storage. Based on the data bits, the memory device may generate a codeword that includes the data bits, parity bits, and placeholder bits. The memory device may balance the codeword by inverting one or more packets of the codeword. After balancing the codeword, the memory device may store at least a portion of the codeword in memory so that a later operation or a decoding process reveals the packets that were inverted as part of the balancing process. Accordingly, the memory device may re-invert the appropriate packets to recover the original data bits.

Generating a balanced codeword protected by an error correction code

Methods, systems, and devices for generating a balanced codeword protected by an error correction code are described. A memory device may receive data bits for storage. Based on the data bits, the memory device may generate a codeword that includes the data bits, parity bits, and placeholder bits. The memory device may balance the codeword by inverting one or more packets of the codeword. After balancing the codeword, the memory device may store at least a portion of the codeword in memory so that a later operation or a decoding process reveals the packets that were inverted as part of the balancing process. Accordingly, the memory device may re-invert the appropriate packets to recover the original data bits.

MULTIPLE-SYMBOL COMBINATION BASED DECODING FOR GENERAL POLAR CODES

The present disclosure relates to multiple-symbol combination based decoding for general polar codes. Multiple-symbol combination based decoding of a received word that is based on a codeword involves determining whether all nodes at an intermediate stage of the multiple-symbol combination based decoding, which provide their outputs as inputs to a subset of nodes at a next stage of the multi-symbol combination based decoding, are associated with trust symbols in the received word that have a higher reliability of being successfully decoded than doubt symbols in the received word. A hard decision is performed in response to a positive determination.

Efficient high/low energy zone solid state device data storage
09846613 · 2017-12-19 · ·

Methods and apparatus associated with storing data in high or low energy zones are described. Example apparatus include a data storage system (DSS) that protects a message using an erasure code (EC). A location in the DSS may have an energy efficiency rating or a latency. Example apparatus include circuits that produce EC encoded data that has a likelihood of use, that select a location to store the EC encoded data in the DSS based on the energy efficiency rating, the latency, or the likelihood of use, that store the EC encoded data in the location, and that compute an order of retrieval for EC encoded data stored in the location. The order of retrieval may be based on the energy efficiency rating or the latency. The EC encoded data may also have a priority based on the number of erasures for which the EC corrects.

TRANSMISSION OF PULSE POWER AND DATA IN A COMMUNICATIONS NETWORK

In one embodiment, a method includes transmitting pulse power on two wire pairs, the pulse power comprising a plurality of high voltage pulses with the high voltage pulses on the wire pairs offset between the wire pairs to provide continuous power, performing low voltage fault detection on each of the wire pairs between the high voltage pulses, and transmitting data on at least one of the wire pairs during transmittal of the high voltage pulses. Data transmittal is suspended during the low voltage fault detection.

METHOD AND DEVICE FOR ENERGY-EFFICIENT DECODERS

A decoder circuit includes first and second decoders. The first decoder is a first type of decoder configured to receive data encoded with an error correction code and decode and eliminate errors from a first subset of codewords of the data. The second decoder is a second type of decoder configured receive the data encoded with the error correction code and decode and eliminate errors from a second subset of codewords of the data, different from the first subset of the codewords, without attempting to decode and eliminate errors from the first subset of the codewords.

Optimizing routing of data across a communications network

A method begins by a first computing device determining a routing plan to route a set of encoded data slices from the first computing device to a second computing device via a plurality of network paths of a communications network. The method continues with the second computing device receiving encoded data slices via one or more network paths. When the second computing device receives a decode threshold number of encoded data slices, the method continues with the second computing device sending a message to the communications network indicating receipt of the decode threshold number of encoded data slices. The method continues with a relay unit determining whether the relay unit is in possession of a not-yet delivered encoded data slice. When the relay unit is in possession of the not-yet delivered encoded data slice, the method continues with the relay unit ceasing forwarding of the not-yet delivered encoded data slice.