H04B1/005

OPTICALLY-STEERED RF IMAGING RECEIVER USING PHOTONIC SPATIAL BEAM PROCESSING
20230110986 · 2023-04-13 ·

An RF imaging receiver using photonic spatial beam processing is provided with an optical beam steerer that directs the modulated optical signals to steer the composite optical signal and move the location of the spot on the optical detector array. The optical beam steerer may be implemented with one or more phase-dependent steering units in which each unit includes a waveplate and polarization grating to steer the modulated optical signals. The optical beam steerer may be configured to act on the individual modulated optical signals to induce individual phase delays that produce a phase delay with a linear term, and possibly spherical or aspherical terms, to steer the composite optical signal in which case the optical beam steerer may be implemented, for example, with an optical phase modulator and optical antenna in each optical channel which together form an OPA, a Risley prism or a liquid crystal or MEMs spatial light modulator.

WIRELESS COMMUNICATION CHIP THAT MAKES BOTH 5 GHZ BAND AND 6 GHZ BAND SUPPORT TWO TRANSMIT AND TWO RECEIVE PATHS
20220337283 · 2022-10-20 · ·

A wireless communication chip includes an analog front-end circuit and a baseband circuit. The analog front-end circuit includes a first transceiver circuit and a second transceiver circuit, wherein the first transceiver circuit is arranged to transmit or receive signals through a first antenna, and the second transceiver circuit is arranged to transmit or receive signals through a second antenna. The baseband circuit is arranged to control the first transceiver circuit to use a first band or a second band for communication, and/or to control the second transceiver circuit to use the first band or the second band for communication. The baseband circuit controls the first transceiver circuit and the second transceiver circuit so that the analog front-end circuit alternately performs 2T2R in the first band and 2T2R in the second band.

METHOD AND APPARATUS FOR HANDLING OVERHEAT OF ELECTRONIC DEVICE

An electronic device and method for efficiently processing overheat in an electronic device are provided. The electronic device includes a transceiver and at least one processor configured to identify overheat inside the electronic device and transmit, to a base station, a first message containing overheat assistance information generated in response to identifying the overheat inside the electronic device.

Client wireless device that merges functions of upper and lower MAC layers to support WLAN modules operating simultaneously in different wireless bands

A simultaneous client wireless device includes wireless modules configured to perform communication functions of a PHY (physical) layer for wireless radios operable in different bands. The simultaneous client wireless device also includes a communication module configured as an intermediate layer between the PHY layer of the wireless modules and a network layer. The communication module is configured to use an application programming interface to retrieve information from the PHY layer and write information to the PHY layer of the wireless modules, perform communication functions of upper MAC (media access control) and lower MAC layers for the wireless bands, and manage simultaneous communications over the wireless bands. The communications over the wireless bands can use a local area network protocol.

METHOD FOR APPLYING MSD AND APPARATUS THEREOF

A disclosure of this specification provides a device configured to operate in a wireless system, the device comprising: a transceiver configured with an Evolved Universal Terrestrial Radio Access (E-UTRA)-New Radio (NR) Dual Connectivity (EN-DC), wherein the EN-DC is configured to use three bands, a processor operably connectable to the transceiver, wherein the processer is configured to: control the transceiver to receive a downlink signal, control the transceiver to transmit an uplink signal via at least two bands among the three bands, wherein a value of Maximum Sensitivity Degradation (MSD) is applied to a reference sensitivity for receiving the downlink signal.

SYSTEMS AND METHODS FOR INTEGRATION OF INJECTION-LOCKED OSCILLATORS INTO TRANSCEIVER ARRAYS
20230142749 · 2023-05-11 ·

Systems and methods for integrating injection-locked oscillators into transceiver arrays are disclosed. In one aspect, there is provided an injection-locked oscillator (ILO) distribution system including a master clock generator configured to generate a master clock signal. The ILO distribution system also includes an ILO distribution circuit including an ILO and configured to receive the master clock signal. The ILO is configured to generate a reference clock signal based on the master clock signal. The ILO distribution circuit is further configured to generate an output signal indicative of an operating frequency of the ILO. The ILO distribution system further includes an injection-locked detector (ILD) configured to receive the master clock signal and the output signal. The ILD is further configured to determine whether the ILO is in a locked state or in an unlocked state based on the master clock signal and the output signal.

Independent tuning system for antenna, tuning method, and communication device

An independent tuning system for an antenna, a tuning method, and a communication device are disclosed. The independent tuning system for the antenna is applicable to a communication device. The communication device includes an antenna tuner, a tuning driver and a tuning program. The tuning program includes: a storage component, an input component, a matching component, and a tuning component. A tuning parameter corresponding to optimized antenna efficiency is matched according to a tuning parameter input by a user and a graph or curve chart of correspondence information between tuning parameters and antenna efficiency stored in the tuning component. An NV value of the tuning driver is tuned according to the tuning parameter to achieve independent optimized tuning of the antenna.

Single-channel, full-time full-duplex wireless signal transmission system

A wireless single-frequency-channel, full-duplex, full-time transmit and receive communication node includes an antenna that transmits a transmit signal over a wireless transmit channel and that receives a receive signal over a wireless receive channel. A communications processor includes a first port electrically coupled to the antenna and a second port electrically coupled to a transmit path where the transmit path connects the second port to the first port. A third port of communications processor is electrically coupled to a receive path that connects the first port to the third port. The communications processor is configured to pass the transmit signal in the transmit path to the first port and configured to pass the receive signal in the receive path from the first port to the third port such that the transmit signal and the receive signal occupy a same frequency channel and operate simultaneously in a same time slot.

Multi-Interface Transponder Device- Altering Power Modes
20230209469 · 2023-06-29 ·

Methods for performing power management of a multi-interface transponder (MIT) device, e.g., such as positional tag device. The MIT device may transition between various power states, e.g., based on detected events, such as detecting movement of the MIT device, receiving a wakeup signal, receiving an indication of a transition in transportation mode, and/or detecting that the MIT device may be lost, such as based on a lack of contact with another device for more than a threshold period of time.

RFID RECEIVER AND METHOD OF EXTRACTING DATA BITS ENCODED IN A RADIO SIGNAL
20170372102 · 2017-12-28 ·

An RFID receiver (1) comprises an antenna (11) configured to receive a radio signal (20) from an RFID transmitter (2) and to generate an electrical signal (110) from the radio signal (20) received from the RFID transmitter (2). A decoder circuit (10) is connected to the antenna (11) and configured to extract from the electrical signal (110) generated by the antenna (11) data bits encoded in the electrical signal (110). The decoder circuit (10) comprises an analog-to-digital converter (12) connected directly to the antenna (11) and configured to generate a digital input signal (13) from the electrical signal (110) generated by the antenna (11). A bit extractor (14) is connected to the analog-to-digital converter (12) and configured to extract the data bits from the digital input (13) signal generated by the analog-to-digital converter (12).