A signal processing method includes: sending a first data signal and receiving a second data signal in a first resource block (RB) of a first subframe; and sending a first reference signal according to first reference information and receiving a second reference signal according to second reference information in the first RB, where: the first reference information is different from the second reference information; the first reference information includes: a time-frequency resource location occupied by the first reference signal, and sequence information of the first reference signal; and the second reference information includes: a time-frequency resource location occupied by the second reference signal, and sequence information of the second reference signal.

Systems, apparatuses, and methods for performing common mode extraction for data communication are disclosed. A circuit is configured to receive a single-ended data signal on a first input port and couple the data signal to a positive input terminal of a receiver component. The circuit is also configured to receive a differential clock signal on second and third input ports and generate a reference signal from the differential clock signal. In one embodiment, the reference signal is generated from an average of the differential clock signal. The circuit is configured to couple the reference signal to a negative input terminal of the receiver component. In one embodiment, the receiver component is an amplifier.

Systems, apparatuses, and methods for performing common mode extraction for data communication are disclosed. A circuit is configured to receive a single-ended data signal on a first input port and couple the data signal to a positive input terminal of a receiver component. The circuit is also configured to receive a differential clock signal on second and third input ports and generate a reference signal from the differential clock signal. In one embodiment, the reference signal is generated from an average of the differential clock signal. The circuit is configured to couple the reference signal to a negative input terminal of the receiver component. In one embodiment, the receiver component is an amplifier.

An equalizer circuit includes: an analog front end circuit configured to receive an analog input signal from a transmission line; an analog finite impulse response filter circuit including: a sample and hold circuit configured to sample an output of the analog front end circuit; and a weighting circuit configured to weight the output of the analog front end circuit to generate a feedforward signal; and a decision feedback equalizer circuit configured to receive an output of the analog front end circuit and the feedforward signal.

An equalizer circuit includes: an analog front end circuit configured to receive an analog input signal from a transmission line; an analog finite impulse response filter circuit including: a sample and hold circuit configured to sample an output of the analog front end circuit; and a weighting circuit configured to weight the output of the analog front end circuit to generate a feedforward signal; and a decision feedback equalizer circuit configured to receive an output of the analog front end circuit and the feedforward signal.

A communication component includes a conductive part and a controlling module. The conductive part includes a metal main body, a first lower ground pin, a first upper ground pin, a second lower ground pin, and a second upper ground pin. The first upper ground pin is located over the first lower ground pin. The second upper ground pin is located over the second lower ground pin. The controlling module includes a circuit board, a first ground pad, a second ground pad, and a plurality of terminal contact pads. The circuit board contacts the first lower ground pin, the first upper ground pin, the second lower ground pin, and the second upper ground pin. The first ground pad contacts the first lower ground pin and the first upper ground pin. The second ground pad contacts the second lower ground pin and the second upper ground pin.

A communication component includes a conductive part and a controlling module. The conductive part includes a metal main body, a first lower ground pin, a first upper ground pin, a second lower ground pin, and a second upper ground pin. The first upper ground pin is located over the first lower ground pin. The second upper ground pin is located over the second lower ground pin. The controlling module includes a circuit board, a first ground pad, a second ground pad, and a plurality of terminal contact pads. The circuit board contacts the first lower ground pin, the first upper ground pin, the second lower ground pin, and the second upper ground pin. The first ground pad contacts the first lower ground pin and the first upper ground pin. The second ground pad contacts the second lower ground pin and the second upper ground pin.