Embodiments are disclosed for a sequence selective symbol checker for communication systems. An example method includes configuring a symbol checker of a receiver with first binary sequence data generated by a symbol generator of the receiver. The example method also includes comparing, using the symbol checker, second binary sequence data provided by a transmitter to the first binary sequence data to generate error count data related to a number of errors for symbols associated with the second binary sequence data. The example method also includes determining total count data related to a number of symbols associated with the first binary sequence data. The example method also includes determining error ratio data associated with the transmitter based on the error count data and the total count data.

Embodiments are disclosed for a sequence selective symbol checker for communication systems. An example method includes configuring a symbol checker of a receiver with first binary sequence data generated by a symbol generator of the receiver. The example method also includes comparing, using the symbol checker, second binary sequence data provided by a transmitter to the first binary sequence data to generate error count data related to a number of errors for symbols associated with the second binary sequence data. The example method also includes determining total count data related to a number of symbols associated with the first binary sequence data. The example method also includes determining error ratio data associated with the transmitter based on the error count data and the total count data.

Aspects of the present disclosure describe systems, methods, and structures for high speed frequency hopping distributed acoustic sensing using an acousto-optic modulated (AOM), gated re-circulating loop and a frequency shifted receiver local oscillator. Using the re-circulating loop controlled by the AOM to generate frequency-hopping pulse(s) increases DAS acoustic bandwidth overcomes infirmities exhibited in the art that generate multiple frequency patterns that are not suitable for long-distance DAS. Additionally, by employing frequency shifted local oscillator (LO) with asymmetric in band detection, bandwidth requirements are reduced by one half.

Mechanisms to reduce noise and/or energy consumption in PAM communication systems, utilizing conditional symbol substitution in each burst interval of a multi-data lane serial data bus.

Encoders and decoders for encoding and decoding data according to a coding scheme. The encoder converts N bits of input data into M voltage signals for transmission over M parallel wires to a decoder having one or two decoding stages that recover the N bits of data from the M voltage signals. The coding scheme is an N-bit, M-wire PAM-Q code in which each voltage signal w.sub.i has one of Q voltage levels I.sub.1-I.sub.Q, where I.sub.1<I.sub.2< . . . <I.sub.Q, and the different sets of M voltage signals for the different N-bit input values are permutations of a single set of M voltage signals. The decoder has a comparator stage. For the decoder having one other decoding stage, the other decoding stage is a computation stage or a logic stage that is before or after the comparator stage.

An illustrative receiver includes: a decision element that derives symbol decisions from a slicer input signal; an equalizer that converts a receive signal into the slicer input signal; a summer that combines the symbol decisions with the slicer input signal to produce an error signal; and a level finder that operates on said signals to determine thresholds at which each signal has a given probability of exceeding the threshold. One illustrative level finder circuit includes: a gated comparator and an asymmetric accumulator. The gated comparator asserts a first or a second gated output signal to indicate when an input signal exceeds or falls below a threshold with a programmable condition being met. The asymmetric accumulator adapts the threshold using up steps for assertions of the first gated output signal and down steps for assertions of the second gated output signal, with the up-step size being different than the down-step size.

Encoders and decoders for encoding and decoding data according to a coding scheme. The encoder converts N bits of input data into M voltage signals for transmission over M parallel wires to a decoder having one or two decoding stages that recover the N bits of data from the M voltage signals. The coding scheme is an N-bit, M-wire PAM-Q code in which each voltage signal w.sub.i has one of Q voltage levels l.sub.1-l.sub.Q, where l.sub.1<l.sub.2< . . . <l.sub.Q, and the different sets of M voltage signals for the different N-bit input values are permutations of a single set of M voltage signals. The decoder has a comparator stage. For the decoder having one other decoding stage, the other decoding stage is a computation stage or a logic stage that is before or after the comparator stage.

A DeMux/Mux module comprises a first submodule comprising a first fiber and a second fiber disposed symmetrically about a first optical axis of the first submodule, a first lens and a first WDM filter attached to the first lens, A first incident light is incident on the first WDM filter. Light having a first transmitted wavelength is transmitted through the first WDM filter and is output from the second fiber. Light having wavelengths other than the first transmitted wavelengths is reflected from the first WDM filter, and input to a second submodule through light propagation in free space.

A DeMux/Mux module comprises a first submodule comprising a first fiber and a second fiber disposed symmetrically about a first optical axis of the first submodule, a first lens and a first WDM filter attached to the first lens, A first incident light is incident on the first WDM filter. Light having a first transmitted wavelength is transmitted through the first WDM filter and is output from the second fiber. Light having wavelengths other than the first transmitted wavelengths is reflected from the first WDM filter, and input to a second submodule through light propagation in free space.

A system that switches between a clock signal from a first line card and a clock signal from a second line card based on information transmitted from the first line card and the second line card on timing signals is presented. Some methods include receiving a first pulse-width modulated clock signal from a first line card, the first pulse-width modulated clock signal including information regarding the status of the first line card; receiving a second pulse-width modulated clock signal from a second line card, the second pulse-width modulated clock signal including information regarding the status of the second line card; producing a clock signal from the first pulse-width modulated clock signal; and switching to producing the clock signal from the second pulse-width modulated clock signal based on the information in the first pulse-width modulated clock signal.