The present invention is a superheterodyne radio receiver comprising a radio frequency front end (2) which processes a radio signal, received by means of an antenna (1) and including a desired signal, at the original frequency of the radio signal and which transmits said radio signal to a stirrer (3) in order to be converted into digital signal. Accordingly, the present invention is characterized in that said radio frequency front end (2) comprises a first amplifier (211) and a first LC filter (221) connected to said first amplifier (211), said radio frequency front end (2) comprises a second amplifier (212) connected serially to said first amplifier (211) in order to raise the radio signal, and further comprises a second LC filter (222) connected to said second amplifier (212) in order to filter the radio signal in a stepped manner.

The present disclosure is directed to apparatuses for preventing significant amounts of common mode noise from a PHY transceiver, such as an Ethernet PHY transceiver, from coupling to an unshielded twisted-pair cable. The apparatuses can provide common mode noise isolation, while limiting any common mode noise to differential mode noise (CM-DM) conversion. Common mode noise is generally ignored by a PHY transceiver that receives a differential data signal because of differential signaling. However, when common mode noise is converted to differential mode noise, then data errors can result. Thus, limiting any CM-DM conversion is important.

An integrated circuit is described herein. According to one or more embodiments, the integrated circuit includes a local oscillator with a voltage-controlled oscillator (VCO) that generates a local oscillator signal. Further, the integrated circuit includes a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor. A first test pad of the integrated circuit is configured to receive a reference oscillator signal. Further, the integrated circuit includes a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal.

A system and method for the synchronization of a central controller wirelessly for determining values of electrical parameters. The method includes sampling an electrical signal via at least one self-powered power sensor (SPPS); estimating, via the at least one SPPS, a time-stamp based on the sampled electrical signal; estimating, via the at least one SPPS, at least a first electrical parameter; generating a preamble of a packet; generating a synchronization information for a synchronization field of the packet; transmitting the packet components wirelessly; determining a time offset value for the packet based on the time-stamp and the transmission time-stamp of the synchronization information; and transmitting the time offset value by appending the time offset value to the packet, wherein the time offset value is used for determining at least a second electrical parameter.

A surface acoustic wave (SAW) filter that receives an aggregate circuit and outputs two or more sub-signals on outputs each of a different frequency band. The sub-signals are amplified by low noise amplifiers and, in one implementation, the amplified sub-signals can be summed. The outputs are connected via a switched passive network so that portions of the sub-signals on the outputs that are not in the selected frequency band are at least partially terminated.

A method and apparatus for removal of a parasitic coupling of a signal source to an output of an antenna array comprising at least one antenna element connected via an associated controllable switch to a signal receiver connected to the output of said antenna array, the method includes measuring a parasitic coupling signal received by the signal receiver connected to the output of said antenna array while all switches of the antenna array are switched off and a first reference signal received by a reference signal receiver; measuring a total reception signal for each antenna element and a second reference signal; calculating a parasitic coupling free reception signal for each antenna element by subtracting a ratio between the measured parasitic coupling signal and the measured first reference signal from a ratio between the total reception signal.

An integrated circuit is described herein. According to one or more embodiments, the integrated circuit includes a local oscillator with a voltage-controlled oscillator (VCO) that generates a local oscillator signal. Further, the integrated circuit includes a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor. A first test pad of the integrated circuit is configured to receive a reference oscillator signal. Further, the integrated circuit includes a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal.

Electrical cables with integral surge protection are disclosed. An example electrical cable surge protector includes an electrically insulated cable; first and second plugs; and a surge protection circuit electrically coupled to be integral with the power cable with the electrically insulated cable and configured to divert surge energy conducted between the first and second plugs by the electrically insulated cable.

A transceiving circuit, which comprises: a transmitting circuit, configured to transmit a test signal; a receiving circuit, comprising a mixer configured to receive a plurality of predetermined DC bias voltage groups, wherein the receiving circuit generates a plurality of output signals according to the test signal while the mixer operates at the predetermined DC bias voltage groups; a frequency domain analyzing circuit, configured to transform the output signals to a plurality of frequency domain signals; and a DC bias voltage generating circuit, configured to generate a function according to the frequency domain signals and the predetermined bias voltage groups, and configured to generate a first DC bias voltage group to the mixer according to the function.

An apparatus for reducing a magnetic coupling between a first electronic circuit and a second electronic circuit is provided. The apparatus includes a conductor loop enclosing the first electronic circuit or the second electronic circuit, and a tuning element coupled to the conductor loop. The conductor loop and the tuning element form a resonant circuit, wherein the tuning element is configured to adjust a resonance frequency of the resonant circuit to a frequency related to a frequency of a signal processed by the second electronic circuit.