A test structure for measuring static noise margin (SNM) for one or more static random access memory (SRAM) cells can include a first transistor gate (TG) and a second TG electrically coupled to each SRAM cell. In an implementation, an interconnect between an output of a first inverter and an input of a second inverter of the SRAM cell can be electrically disconnected using a cut off. During operation of the SRAM cell, internal storage nodes within the SRAM cell can be electrically coupled through the first TG and the second TG to, for example, external pins and to a test fixture. Electrical parameters such as voltage can be measured at the internal storage nodes through the external pins and used to calculate SNM of the SRAM cell.

A wireless communication apparatus includes a first antenna circuit that forms a beam selected from among a plurality of first beams through a beamforming process performed for communication using a millimeter wave band and a monitor that displays a first pattern indicating a radiation direction of the selected beam.

A wireless communication apparatus includes a first antenna circuit that forms a beam selected from among a plurality of first beams through a beamforming process performed for communication using a millimeter wave band and a monitor that displays a first pattern indicating a radiation direction of the selected beam.

According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

According to at least one example embodiment, a method and corresponding apparatus for controlling power in a multi-core processor chip include: accumulating, at a controller within the multi-core processor chip, one or more power estimates associated with multiple core processors within the multi-core processor chip. A global power threshold is determined based on a cumulative power estimate, the cumulative power estimate being determined based at least in part on the one or more power estimates accumulated. The controller causes power consumption at each of the core processors to be controlled based on the determined global power threshold. The controller may directly control power consumption at the core processors or may command the core processors to do so.

Systems and methods may use proximate communication to retrieve information pertaining to a target device. In one example, the method may include detecting the target device within a vicinity of a user device, receiving an information request response communication including information pertaining to the target device, and receiving an operation request response communication including information pertaining to a performed operation.

Systems and methods may use proximate communication to retrieve information pertaining to a target device. In one example, the method may include detecting the target device within a vicinity of a user device, receiving an information request response communication including information pertaining to the target device, and receiving an operation request response communication including information pertaining to a performed operation.

A method detects a fault on a line of an electrical power supply system, in which current values are measured at the line ends of the line and the current values are used to check whether there is a fault on the line. In order to perform monitoring of the line such that faults can be detected comparatively quickly and sensitively, it is proposed that voltage values are also measured at the line ends. The respective measured current and voltage values are used to ascertain respective comparison current values indicating the current flowing at a comparison location on the line and the respective comparison current values are used to check for the presence of a fault on the line, and a fault signal is generated if the check has resulted in a fault present on the line being detected.

A method detects a fault on a line of an electrical power supply system, in which current values are measured at the line ends of the line and the current values are used to check whether there is a fault on the line. In order to perform monitoring of the line such that faults can be detected comparatively quickly and sensitively, it is proposed that voltage values are also measured at the line ends. The respective measured current and voltage values are used to ascertain respective comparison current values indicating the current flowing at a comparison location on the line and the respective comparison current values are used to check for the presence of a fault on the line, and a fault signal is generated if the check has resulted in a fault present on the line being detected.

In a control device 22 constituting a communication terminal measurement apparatus 10, a display control unit 30d displays an NR connection confirmation/support screen 36a indicating a connection mode for connection between an NR measurement device 20 and a communication terminal 11a, and an LTE connection confirmation/support screen 36b indicating a connection mode for connection between a LTE measurement device 21 and the communication terminal 11a. Further, information on the signal of the NR communication standard is attached as a text to the image of the port through which the signal of the NR communication standard is input and output, and information on the signal of the LTE communication standard is attached as a text to an image of the port through which the signal of the LTE communication standard is input and output.