A transmitter may receive client data, associated with a client rate, to be mapped to frames associated with a server rate. The transmitter may generate justifications associated with the mapping of the client data to the frames. The transmitter may create, based on the justifications, artificial justifications that include information associated with justifications created to shape phase variations present in a recovered client clock associated with the client rate. The phase variations may be shaped based on the artificial justifications to cause shaped phase variations to be present in the recovered client clock. The shaped phase variations may include phase variations that can be filtered from the recovered client clock. The transmitter may map the client data to the frames based on the artificial justifications to cause the shaped phase variations to be present in the recovered client clock.

Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.

Apparatuses, systems, and methods for a digital power amplifier (DPA) to generate a monotonic and linear ramp-up and ramp-down for a time division multiple access (TDMA) slot transmission are described. In one aspect, a monotonic and linear amplitude-to-control input code relationship model is generated for the DPA and stored. When the DPA needs to generate a ramp-up or ramp-down, the stored monotonic and linear amplitude-to-control input code relationship model is used to shape the input control code before it is input into the DPA. A new monotonic and linear amplitude-to-control input code relationship model may be generated and stored if the operating conditions change. The apparatuses, systems, and methods described herein may be applied to a multi-standard broadband modem chip capable of 2G transmission.

There are provided measures for reference configuration for flexible time division duplexing. Such measures exemplarily include obtaining a first configuration parameter and a second configuration parameter, determining an uplink reference configuration for a flexible uplink/downlink mode from said first configuration parameter, determining a downlink reference configuration for said flexible uplink/downlink mode from said second configuration parameter, and deriving an uplink/downlink configuration candidate set based on at least one of said first configuration parameter and said second configuration parameter.

There are provided measures for reference configuration for flexible time division duplexing. Such measures exemplarily include obtaining a first configuration parameter and a second configuration parameter, determining an uplink reference configuration for a flexible uplink/downlink mode from said first configuration parameter, determining a downlink reference configuration for said flexible uplink/downlink mode from said second configuration parameter, and deriving an uplink/downlink configuration candidate set based on at least one of said first configuration parameter and said second configuration parameter.

Methods, systems, and devices are described for resource scheduling for different services in a wireless communications system. A base station or a user equipment (UE) operating within a wireless communication system may, for example, communicate using two or more different configurations of resource (e.g., symbol) duration, while maintaining a common tone spacing, bandwidth, transmission time interval (TTI) designation, or the like. For instance, an orthogonal frequency division multiplexing (OFDM) symbol may be subdivided or segmented, and each segment, which may include a cyclic prefix, may be utilized as a resource unit.

Radio frame configuration circuitry for use in a device of a wireless communication system is provided. The radio frame configuration circuitry uses control circuitry to select between a plurality of different time-division duplex, TDD, configurations for a radio frame having slots with a configured duration. Transceiver circuitry performs TDD communications based on selections made by the control circuitry such that an average periodicity of switching between transmission of information and reception of information during the TDD communication is the same despite switching between different ones of the plurality of different TDD configurations. The radio frame configuration circuitry can be incorporated in a UE or an eNodeB or a Peer Radio Head. A corresponding method is provided.

Radio frame configuration circuitry for use in a device of a wireless communication system is provided. The radio frame configuration circuitry uses control circuitry to select between a plurality of different time-division duplex, TDD, configurations for a radio frame having slots with a configured duration. Transceiver circuitry performs TDD communications based on selections made by the control circuitry such that an average periodicity of switching between transmission of information and reception of information during the TDD communication is the same despite switching between different ones of the plurality of different TDD configurations. The radio frame configuration circuitry can be incorporated in a UE or an eNodeB or a Peer Radio Head. A corresponding method is provided.

In one embodiment, an integrated circuit has one or more multi-channel transmitters, each transmitter having synchronization circuitry that synchronizes different copies of a reset signal used to reset different sets of TX channel circuitry used to generate the multiple TX signals, to reduce the skew between the different TX signals. Each set of synchronization circuitry has (at least) two synchronization stages that re-time different copies of the reset signal to a selected clock signal. In one implementation, the integrated circuit has (at least) two quads, each of which can generate four different TX signals, where both quads can be configured to use the same clock signal to re-time different copies of the reset signal such that the eight different TX signals are all synchronized to one another.

In one embodiment, an integrated circuit has one or more multi-channel transmitters, each transmitter having synchronization circuitry that synchronizes different copies of a reset signal used to reset different sets of TX channel circuitry used to generate the multiple TX signals, to reduce the skew between the different TX signals. Each set of synchronization circuitry has (at least) two synchronization stages that re-time different copies of the reset signal to a selected clock signal. In one implementation, the integrated circuit has (at least) two quads, each of which can generate four different TX signals, where both quads can be configured to use the same clock signal to re-time different copies of the reset signal such that the eight different TX signals are all synchronized to one another.