A method comprising: accessing a response mapping defining a set of safety-critical functions associated with a safety-critical latency threshold and a set of safety responses, each safety response corresponding to a safety-critical function; executing a time-synchronization protocol with a transmitting system to calculate a clock reference; accessing a safety message schedule indicating an expected arrival time for each safety message in a series of safety messages based on the clock reference; for each safety message in the series of safety messages, calculating a latency of the safety message based on an arrival time of the safety message and the expected arrival time; and in response to a latency of a current safety message in the series of safety messages exceeding the safety-critical latency threshold, initiating the safety response corresponding to the safety-critical function for each safety-critical function in the set of safety-critical functions.

A phase calibration method includes: segmenting a received measurement sequence according to a preset rule; respectively determining a phase calibration factor of each of segmented measurement sequences, wherein the each of the segmented measurement sequences respectively corresponds to a segmented phase; and when performing a phase calibration on a sequence to be verified, according to a matching relation between a phase of the sequence to be verified and the each of the segmented phases, using the phase calibration factor corresponding to a matched segmented phase to perform the phase calibration on the sequence to be verified. The embodiments of the phase calibration method and the device are equivalent to dividing a non-linear measurement sequence into several approximately linear measurement sequences, and then calibrating each of the several approximately linear measurement sequences using a corresponding phase calibration factor respectively.

A translation device, a test system, and a memory system are provided. The translation device includes plural first input/output (I/O) circuits that respectively transmit and receive first signals through plural pins based on a pulse amplitude modulation (PAM)-M mode, a second I/O circuit that transmits and receives a second signal through one or more pins based on a PAM-N mode, and a translation circuit that translates the first signals into the second signal and translates the second signal into the first signals. M and N are different integers of 2 or more.

There is provided a clock and data recovery circuit for a high-speed PAM-4 receiver through statistical learning. A clock and data recovery device according to an embodiment includes: an input unit through which data is inputted; a clock input unit through which a clock is inputted; a sampling unit configured to sample the inputted data by using the inputted clock; a controller configured to combine results of sampling at a plurality of sampling points, to determine a state of the clock based on the combined results, and to generate a control value for controlling the clock; and an adjustment unit configured to adjust the clock applied to the sampling unit, based on the control value generated by the controller. Accordingly, a hardware structure is simplified and energy efficiency is enhanced compared to an exiting oversampling clock and data recovery circuit for a PAM-4 receiver.

A time-synchronization system according to the present disclosure includes a relay apparatus (10) configured to perform time-synchronization with a master apparatus (30) through a transmission system of which a transmission delay changes depending on a transmission direction, and a relay apparatus (20) configured to perform time-synchronization with the relay apparatus (10), in which the relay apparatus (20) transmits information about a difference between first time information obtained by performing time-synchronization with the relay apparatus (10) and second time information obtained from a time-synchronization source to the relay apparatus (10), and the relay apparatus (10) corrects third time information obtained by performing time-synchronization with the master apparatus (30) by using the information about the difference, and performs time-synchronization with a slave apparatus (50) by using the corrected third time information.

The present invention is directed to communication method and techniques. In a specific embodiment, the present invention provides a receiver that interleaves data signal n-ways for n slices. Each of the n slices includes feedforward equalizer and decision feedback equalizers that are coupled to other slices. Each of the n slices also includes an analog-to-digital converter section that includes data and error slicers. There are other embodiments as well.

Devices, systems, and methods for hardware-based time synchronization for heterogenous sensors are described. An example method includes generating a plurality of input trigger pulses having a nominal pulse-per-second (PPS) rate, generating, based on timing information derived from the plurality of input trigger pulses, a plurality of output trigger pulses, and transmitting the plurality of output trigger pulses to a sensor of a plurality of sensors, wherein a frequency of the plurality of output trigger pulses corresponds to a target operating frequency of the sensor, wherein, in a case that a navigation system coupled to the synchronization unit is functioning correctly, the plurality of input trigger pulses is generated based on a nominal PPS signal from the navigation unit, and wherein, in a case that the navigation system is not functioning correctly, the plurality of input trigger pulses is generated based on a simulated clock source of the synchronization unit.

The present technology proposes techniques for generating globally coherent timestamps. This technology may allow distributed systems to causally order transactions without incurring various types of communication delays inherent in explicit synchronization. By globally deploying a number of time masters that are based on various types of time references, the time masters may serve as primary time references. Through an interactive interface, the techniques may track, calculate and record data relative to each time master thus providing the distributed systems with causal timestamps.

A system includes a first controller configured to transmit a synchronization signal to a second controller. The second controller is configured to produce a PWM signal. The system also includes a counter configured to provide a count for the second controller, where the second controller is configured to initiate rising edges and falling edges of the PWM signal based on the count from the counter. The second controller is also configured to measure an error between a time when the synchronization signal is received at the second controller and an expected time of receipt for the synchronization signal. The second controller is also configured to adjust a period of the counter based at least in part on the error.

Generating, during a first and second signaling interval, an aggregated data signal by forming a linear combination of wire signals received in parallel from wires of a multi-wire bus, wherein at least some of the wire signals undergo a signal level transition during the first and second signaling interval; measuring a signal skew characteristic of the aggregated data signal; and, generating wire-specific skew offset metrics, each wire-specific skew offset metric based on the signal skew characteristic.