Cauls and methods of using the same are provided. The caul includes a reinforcement material having one or more elastic fibers and a polymer having one or more shape memory polymers. The caul is operable to transition from a rigid state to an elastomeric state and from an elastomeric state to a rigid state in response to stimuli. Methods of using cauls to produce composite articles involve positioning one or more fiber layers between a caul and a cure mold surface when the caul is in a rigid state. The fiber layers, caul, and cure mold surface may be covered with a sealed barrier and a pressure gradient may be applied. Before, after, or before and after performing the vacuum the fiber layers may be impregnated with resin. The fiber layers may be cured, which may provide a stimulus to transition the caul from a rigid to an elastomeric state.

Methods and systems are described for sequentially obtaining a plurality of data streams, the plurality of data streams comprising a data stream in a current condition, a data stream in a skewed-forward condition, and a data stream in a skewed-backward condition, calculating, for each data stream in the plurality of data streams, a corresponding set of cost-function values by obtaining a corresponding set of eye measurements, the eye measurements obtained by adjusting a sampling threshold of a sampler generating a plurality of samples of the data stream, the plurality of samples comprising edge samples and data samples, wherein the data stream is sampled at a rate equal to twice a rate of the data stream and calculating the corresponding set of cost-function values based on the corresponding set of eye measurements, and generating a skew control signal based on a comparison of the sets of calculated cost-function values.

According to one embodiment, there is provided a synchronization control apparatus which synchronizes an STC counter value, based on TAI (Temps Atomique International: international atomic time) time, in each of systems which constitute a transmission system in a broadcasting system or a distribution system, the apparatus includes a processor or a dedicated arithmetic circuit configured to determine a time length in which the STC counter value laps, to calculate a remainder of the time length relative to the TAI time, and to convert the remainder to the STC counter value, thereby determining the STC counter value.

The present disclosure provides a signal receiving apparatus having anti-RFI mechanism that includes an ADC circuit, an equalization circuit and a clock recovery circuit. The ADC circuit performs conversion of an input analog signal according to an internal clock signal, to generate an input digital signal. The equalization circuit equalizes the input digital signal such that the clock recovery circuit adjusts a phase of the internal clock signal and extracts a frequency by performing statistics on phase deviation amount information in a unit of a time window. The clock recovery circuit discards a corresponding phase deviation amount when a signal interference parameter of one of a sub time window is larger than a threshold value to update the phase deviation amount information, and generates an adjusting signal to adjust a frequency of the internal clock signal accordingly.

A receiver circuit includes a clock lane propagating a clock signal. A self-sampled clock applies a delayed version of the clock signal to the clock signal and compensation logic controls an amount of delay of the delayed version of the clock, based on a reference voltage offset (difference) between the receiver and a transmitter. The delayed version of the clock is centered on one unit interval of the clock. An offset correction is computed as a global offset value based on a clock duty cycle error, combined with a local offset value for each data lane, and is applied to data receiver front ends.

A receiver circuit includes a clock lane propagating a clock signal. A self-sampled clock applies a delayed version of the clock signal to the clock signal and compensation logic controls an amount of delay of the delayed version of the clock, based on a reference voltage offset (difference) between the receiver and a transmitter. The delayed version of the clock is centered on one unit interval of the clock. An offset correction is computed as a global offset value based on a clock duty cycle error, combined with a local offset value for each data lane, and is applied to data receiver front ends.

Embodiments are disclosed for timing recovery used in conjunction with a phase detector embedded in a receiver of a communication system. An example method includes receiving, via a receiver of a communication system, an input signal. The input signal encodes a plurality of bits in a number of amplitude levels. The method further includes using an analog to digital converter to generate a sampled signal based on the input signal. The method further includes using a first interpolation filter to filter the sampled signal. The method further includes using a second interpolation filter to filter the sampled signal. The method further includes using a first non-linear device to process an output of the first interpolation filter. The method further includes using a second non-linear device to process an output of the second interpolation filter. The method further includes performing a mathematical operation on an output of the first non-linear device with an output of the second non-linear device to generate phase information.

Methods and apparatus for identification and characterization of latency in a content delivery network. In one embodiment, interaction of users with content is recorded via collection of tuning records; the latency is then utilized to adjust the timing on the tuning records to account for lapses in time for sending these between entities of the network and the user devices, and for processing occurring at the devices. The latency is determined by taking into account a device specific latency component, and a network latency component. The network latency component is determined in one variant by sending a message to the device from the network requesting a response. Once the timing of the tuning records is adjusted, these tuning records may be relied upon as being accurate on a second-by-second basis. Accordingly, tuning records may be obtained and analyzed for content which lasts for a very short period of time.

A leader system for time synchronizing includes an interface and a processor. The interface is configured to receive a time standard. The processor is configured to determine whether a time jump is necessary in response to the time standard; and in response to determining that the time jump is necessary: 1) cause overwriting a sensor data buffer; 2) provide an indication to unregister one or more follower devices from a leader device; and 3) time jump a leader device time in response to the time standard.

Embodiments are disclosed for timing recovery used in conjunction with a phase detector embedded in a receiver of a communication system. An example method includes receiving, via a receiver of a communication system, an input signal. The input signal encodes a plurality of bits in a number of amplitude levels. The method further includes using an analog to digital converter to generate a sampled signal based on the input signal. The method further includes using a first interpolation filter to filter the sampled signal. The method further includes using a second interpolation filter to filter the sampled signal. The method further includes using a first non-linear device to process an output of the first interpolation filter. The method further includes using a second non-linear device to process an output of the second interpolation filter. The method further includes performing a mathematical operation on an output of the first non-linear device with an output of the second non-linear device to generate phase information.