System, methods and apparatus are described that improve link turnaround performance in a differentially driven link. A method performed at a first device coupled to a two-wire serial link includes transmitting from the first device first differentially-encoded data to a second device over the two-wire serial link during a first time period, receiving at the first device second differentially-encoded data from the second device over the two-wire serial link during a second time period, and driving by the first device both wires of the two-wire serial link to a common voltage level during a third time period, the third time period spanning a link turnaround period between the first time period and the second time period. Both wires of the two-wire serial link are driven toward the common voltage level by the second device during the third time period.

System, methods and apparatus are described that improve link turnaround performance in a differentially driven link. A method performed at a first device coupled to a two-wire serial link includes transmitting from the first device first differentially-encoded data to a second device over the two-wire serial link during a first time period, receiving at the first device second differentially-encoded data from the second device over the two-wire serial link during a second time period, and driving by the first device both wires of the two-wire serial link to a common voltage level during a third time period, the third time period spanning a link turnaround period between the first time period and the second time period. Both wires of the two-wire serial link are driven toward the common voltage level by the second device during the third time period.

A circuit system includes: a receiver circuit which outputs a periodic voltage pulse via a bus line; and an ascertaining device configured to ascertain whether the voltage on the bus line has reached a specified threshold value. The circuit system is configured to start the reception of data signals a specified time period after an instant at which the voltage on the bus line has reached the specified threshold value.

Logic to “loosely” manage synch frame transmissions in a synch network via the devices synced to the network that implement the logic. Logic may distributedly adjust the frequency of attempting synch frame transmissions without estimating the size of the neighborhood. Logic in devices of a synch network to let each device maintain a Transmission Window (TW). Logic to determine the frequency of attempting synch frame transmissions based upon the TW. Logic to increase TW if the device detects a synch frame transmission. Logic to decrease TW if the device successfully transmits a synch frame. Logic to balance power consumption and discovery timing by adjusting the decrease in TW responsive to a synch transmission in relation to the increase in TW responsive to detection of a synch transmitted by another device.

Logic to “loosely” manage synch frame transmissions in a synch network via the devices synced to the network that implement the logic. Logic may distributedly adjust the frequency of attempting synch frame transmissions without estimating the size of the neighborhood. Logic in devices of a synch network to let each device maintain a Transmission Window (TW). Logic to determine the frequency of attempting synch frame transmissions based upon the TW. Logic to increase TW if the device detects a synch frame transmission. Logic to decrease TW if the device successfully transmits a synch frame. Logic to balance power consumption and discovery timing by adjusting the decrease in TW responsive to a synch transmission in relation to the increase in TW responsive to detection of a synch transmitted by another device.

A clock and data recovery (CDR) system may use one or more clock signals in sync with recovered data rate. By accumulating a dithering tuning counter value at a data oversampling rate, a plurality of single bit signals at multiples of the recovered data rate and in sync with the recovered data rate can be accurately generated while utilizing the full range of the accumulator. This plurality of clock signals can be used in various modules in the CDR system and other modules in a transceiver system incorporating the CDR system.

A clock and data recovery (CDR) system may use one or more clock signals in sync with recovered data rate. By accumulating a dithering tuning counter value at a data oversampling rate, a plurality of single bit signals at multiples of the recovered data rate and in sync with the recovered data rate can be accurately generated while utilizing the full range of the accumulator. This plurality of clock signals can be used in various modules in the CDR system and other modules in a transceiver system incorporating the CDR system.

Provided is a data transmitter including a signal interval determination unit configured to receive a data input signal corresponding to data to be transmitted, determine time intervals between a synchronization signal and a plurality of data signals according to the data input signal, and output interval signals corresponding to the intervals; a trigger generation unit configured to trigger according to an output signal from the signal interval determination unit; and a signal generation unit configured to receive the trigger to generate the synchronization signal and the data signals.

Provided is a data transmitter including a signal interval determination unit configured to receive a data input signal corresponding to data to be transmitted, determine time intervals between a synchronization signal and a plurality of data signals according to the data input signal, and output interval signals corresponding to the intervals; a trigger generation unit configured to trigger according to an output signal from the signal interval determination unit; and a signal generation unit configured to receive the trigger to generate the synchronization signal and the data signals.

A method may include providing one or more telemetry transmission systems, the one or more transmission systems comprising one or more receivers and one or more transmitters. The method may also include transmitting a first synchronization sequence from the one or more telemetry transmission systems, the first synchronization sequence transmitted in a first channel, and the first synchronization sequence being at least a portion of a first telemetry signal. In addition, the method may include transmitting a second synchronization sequence the one or more telemetry transmission systems, the second synchronization sequence transmitted in a second channel, and the second synchronization sequence being at least a portion of a second telemetry signal. The first and second synchronization sequences may be transmitted simultaneously or at a predetermined time difference. The method may include receiving the first synchronization sequence at the one or more receivers, and receiving the second synchronization sequence at the one or more receivers.