Patent classifications
H04L9/34
System and method for interaction object management in a blockchain environment
A system and method for block management of interactions comprising a network-connected block management computer connected to a plurality of connected devices and to one or more blockchains to enable an object compiler to receive a plurality of criteria from a requesting device. The compiler the receives a plurality of blocks from the blockchains based on the criteria. Each block corresponding to a preconfigured interaction object previously written by devices either during or after the completion of a transaction. The compiler analyzes the preconfigured interaction objects to determine if there is corresponding supplemental object. The compiler requests the supplemental blocks from the blockchains, and processes supplemental objects based on type, if no corresponding supplemental object it found, the associated interaction object is flagged.
Distributed ledger for generating and verifying random sequence
An example operation may include one or more of generating an initial seed and allocating one or more authorized bits of the initial seed to a plurality of blocks in a distributed ledger, storing the initial seed and an identification of which authorized bits of the initial seed are allocated to each block of the distributed ledger, receiving a final seed value that is partially generated by each of a plurality of nodes configured to access the distributed ledger based on authorized bits of respective blocks updated by each respective node, and generating a random sequence value based on the final seed value and storing the random sequence value in a block of the distributed ledger.
Distributed ledger for generating and verifying random sequence
An example operation may include one or more of generating an initial seed and allocating one or more authorized bits of the initial seed to a plurality of blocks in a distributed ledger, storing the initial seed and an identification of which authorized bits of the initial seed are allocated to each block of the distributed ledger, receiving a final seed value that is partially generated by each of a plurality of nodes configured to access the distributed ledger based on authorized bits of respective blocks updated by each respective node, and generating a random sequence value based on the final seed value and storing the random sequence value in a block of the distributed ledger.
Secured communication in passive entry passive start (PEPS) systems
Systems and methods for secure communication between a vehicle and a portable communication device. One system includes a vehicle access system included in the vehicle. The vehicle access system is configured to wirelessly receive a shuffled message from the portable communication device, de-shuffle the shuffled message at a bit level to obtain a message, wherein de-shuffling the shuffled message at a bit level includes exchanging one bit at a first indexed position within the shuffled message with one bit at a second indexed position within the shuffled message, and initiate a vehicle operation based on the message.
Secured communication in passive entry passive start (PEPS) systems
Systems and methods for secure communication between a vehicle and a portable communication device. One system includes a vehicle access system included in the vehicle. The vehicle access system is configured to wirelessly receive a shuffled message from the portable communication device, de-shuffle the shuffled message at a bit level to obtain a message, wherein de-shuffling the shuffled message at a bit level includes exchanging one bit at a first indexed position within the shuffled message with one bit at a second indexed position within the shuffled message, and initiate a vehicle operation based on the message.
Error correction code memory device and codeword accessing method thereof
The codeword accessing method including: receiving a write data with M message bits; generating parity information with N-M bits based on an error correction algorithm and the M message bits, where N and M are positive integers; transforming the M message bits and the parity information to a scrambled codeword with N bits by a scrambling operation, where the scrambled codeword contains only a part of the M message bits; and writing the scrambled codeword into a memory device.
Error correction code memory device and codeword accessing method thereof
The codeword accessing method including: receiving a write data with M message bits; generating parity information with N-M bits based on an error correction algorithm and the M message bits, where N and M are positive integers; transforming the M message bits and the parity information to a scrambled codeword with N bits by a scrambling operation, where the scrambled codeword contains only a part of the M message bits; and writing the scrambled codeword into a memory device.
Method and process for securing an executable image
Control systems and methods for securely loading software in a power control system. In some examples, the control system includes a computing device and a plurality of security modules. The computing device may obtain and divide an executable image into a plurality of images. The computing device may generate a control hash as a function of the plurality of images, and record the control hash. The computing device may store each of the plurality of images in a plurality of security modules. At boot up, the computing device may load, from each security module, the stored image, and store each image to a memory device. The computing device may generate a hash based on the stored images, and compare the generated hash to the recorded control hash. Based on the comparison, the computing device may allow execution of the executable image.
SMART COMPRESSOR BASED ON ADAPTIVE CPU/QAT SCHEDULING METHOD
A method, apparatus, and system for assigning the execution of a cryptography and/or compression operation on a data segment to either a central processing unit (CPU) or a hardware cryptography/compression accelerator is disclosed. In particular, a data segment on which a cryptography and/or compression operation is to be executed is received. Status information relating to a CPU and a hardware cryptography/compression accelerator is determined. Whether the operation is to be executed on the CPU or on the hardware accelerator is determined based at least in part on the status information. In response to determining that the operation is to be executed on the CPU, the data segment is forwarded to the CPU for execution of the operation. On the other hand, in response to determining that the operation is to be executed on the hardware accelerator, the data segment is forwarded to the hardware accelerator for execution of the operation.
SMART COMPRESSOR BASED ON ADAPTIVE CPU/QAT SCHEDULING METHOD
A method, apparatus, and system for assigning the execution of a cryptography and/or compression operation on a data segment to either a central processing unit (CPU) or a hardware cryptography/compression accelerator is disclosed. In particular, a data segment on which a cryptography and/or compression operation is to be executed is received. Status information relating to a CPU and a hardware cryptography/compression accelerator is determined. Whether the operation is to be executed on the CPU or on the hardware accelerator is determined based at least in part on the status information. In response to determining that the operation is to be executed on the CPU, the data segment is forwarded to the CPU for execution of the operation. On the other hand, in response to determining that the operation is to be executed on the hardware accelerator, the data segment is forwarded to the hardware accelerator for execution of the operation.