H04L9/34

Method and apparatus for noise injection for PUF generator characterization

Disclosed is a physical unclonable function generator circuit and method. In one embodiment, physical unclonable function (PUF) generator includes: a PUF cell array that comprises a plurality of bit cells, wherein each of the plurality of bit cells comprises at least two access transistors, at least one enable transistor, and at least two storage nodes, wherein the at least two storage nodes are pre-configured with substantially the same voltages allowing each of the plurality of bit cells having a first metastable logical state; a PUF control circuit coupled to the PUF cell array, wherein the PUF control circuit is configured to access the plurality of bit cells to determine second logical states by turning on the at least one enable transistor and turning off the at least two access transistors of each of the plurality of bit cells, and based on the second logical states of the plurality of bit cells, to generate a PUF output; and a noise injector coupled to the PUF control circuit and the PUF cell array, wherein the noise injector is configured to create stressed operation conditions to evaluate stability of the plurality of bit cells.

SECURED COMMUNICATION IN PASSIVE ENTRY PASSIVE START (PEPS) SYSTEMS

Systems and methods for secure communication between a vehicle and a portable communication device. One system includes a vehicle access system included in the vehicle. The vehicle access system is configured to wirelessly receive a shuffled message from the portable communication device, de-shuffle the shuffled message at a bit level to obtain a message, wherein de-shuffling the shuffled message at a bit level includes exchanging one bit at a first indexed position within the shuffled message with one bit at a second indexed position within the shuffled message, and initiate a vehicle operation based on the message.

User station for a serial bus system, and method for communicating in a serial bus system

A user station for a serial bus system. The user station includes a communication control device for controlling a communication of the user station with at least one other user station, and a transceiver device to serially transmit a transmission signal generated by the communication control device onto a bus and to serially receive signals from the bus. The communication control device generates the transmission signal according to a frame, and inserts a header check sum into the frame, only bits of a frame header that is situated in front of a data field provided for useful data in the frame being included in the computation. For computing the header check sum, the communication control device uses a predetermined starting value and a predetermined check sum polynomial.

User station for a serial bus system, and method for communicating in a serial bus system

A user station for a serial bus system. The user station includes a communication control device for controlling a communication of the user station with at least one other user station, and a transceiver device to serially transmit a transmission signal generated by the communication control device onto a bus and to serially receive signals from the bus. The communication control device generates the transmission signal according to a frame, and inserts a header check sum into the frame, only bits of a frame header that is situated in front of a data field provided for useful data in the frame being included in the computation. For computing the header check sum, the communication control device uses a predetermined starting value and a predetermined check sum polynomial.

DISTRIBUTED LEDGER FOR GENERATING AND VERIFYING RANDOM SEQUENCE
20190273610 · 2019-09-05 ·

An example operation may include one or more of generating an initial seed and allocating one or more authorized bits of the initial seed to a plurality of blocks in a distributed ledger, storing the initial seed and an identification of which authorized bits of the initial seed are allocated to each block of the distributed ledger, receiving a final seed value that is partially generated by each of a plurality of nodes configured to access the distributed ledger based on authorized bits of respective blocks updated by each respective node, and generating a random sequence value based on the final seed value and storing the random sequence value in a block of the distributed ledger.

DISTRIBUTED LEDGER FOR GENERATING AND VERIFYING RANDOM SEQUENCE
20190273610 · 2019-09-05 ·

An example operation may include one or more of generating an initial seed and allocating one or more authorized bits of the initial seed to a plurality of blocks in a distributed ledger, storing the initial seed and an identification of which authorized bits of the initial seed are allocated to each block of the distributed ledger, receiving a final seed value that is partially generated by each of a plurality of nodes configured to access the distributed ledger based on authorized bits of respective blocks updated by each respective node, and generating a random sequence value based on the final seed value and storing the random sequence value in a block of the distributed ledger.

Method and device for the protection of data integrity through an embedded system having a main processor core and a security hardware module
10404717 · 2019-09-03 · ·

A method for protecting data integrity through an embedded system having a main processor core and a security hardware module. The method includes the following: the main processor core generates transmit data, the security hardware module calculates a transmit message authentication code from the transmit data, the main processor core links the transmit data and the transmit message authentication code to form a transmit message, and the main processor core transmits the transmit message to a receiver.

Method and device for the protection of data integrity through an embedded system having a main processor core and a security hardware module
10404717 · 2019-09-03 · ·

A method for protecting data integrity through an embedded system having a main processor core and a security hardware module. The method includes the following: the main processor core generates transmit data, the security hardware module calculates a transmit message authentication code from the transmit data, the main processor core links the transmit data and the transmit message authentication code to form a transmit message, and the main processor core transmits the transmit message to a receiver.

Information security protection system and information security protection method
12015693 · 2024-06-18 · ·

An information security protection method includes: repeatedly substituting a plaintext into an encryption algorithm to obtain a plurality of ciphertexts, and determining whether the ciphertexts are all the same h the processor core. Each time the processor core substitutes the plaintext into the encryption algorithm, the encryption algorithm outputs a ciphertext. When the processor core determines that the ciphertexts are not all the same, the processor core outputs a hacker attack message, which means that an encryption process has suffered a hacker attack.

Information security protection system and information security protection method
12015693 · 2024-06-18 · ·

An information security protection method includes: repeatedly substituting a plaintext into an encryption algorithm to obtain a plurality of ciphertexts, and determining whether the ciphertexts are all the same h the processor core. Each time the processor core substitutes the plaintext into the encryption algorithm, the encryption algorithm outputs a ciphertext. When the processor core determines that the ciphertexts are not all the same, the processor core outputs a hacker attack message, which means that an encryption process has suffered a hacker attack.