An electroacoustic transducer 400 is described. The electroacoustic transducer 400 comprises an active element 410. The electroacoustic transducer 400 comprises an acoustic coupling layer 430 arranged to acoustically couple, in use, the active element 410 to a transmission medium. The electroacoustic transducer 400 further comprises a cavity 420 arranged between the active element 410 and the acoustic coupling layer 430 to receive a fluid. In this way, acoustic coupling of the electroacoustic transducer 400 and the transmission medium is improved.

An electroacoustic transducer array 110 is described. The electroacoustic transducer array 110 comprises a first electroacoustic transducer 40A comprising a first active element 41A and a second electroacoustic transducer 40B comprising a second active element 41B. The electroacoustic transducer array 110 comprises an acoustic coupling layer 43 arranged to acoustically couple, in use, the first active element 41A and the second active element 41B to a transmission medium. The electroacoustic transducer array 110 comprises a first cavity 42A arranged between the first active element 41A and the acoustic coupling layer 43 to receive a first fluid; and/or a second cavity 42B arranged between the second active element 41B and the acoustic coupling layer 43 to receive a second fluid. In this way, acoustic coupling of the electroacoustic transducer array 110 and the transmission medium is improved.

The herein described technology provides a hybrid monopole and slot antenna assembly including an electrically-driven monopole antenna and a parasitic slot antenna. The electrically-driven monopole antenna is fed by a feed line coupled to a first metal portion of a device case exterior, and the parasitic slot antenna is capacitively-driven by a radiating feed element embedded in a dielectric material that resonates a second metal portion of the device case exterior. The hybrid monopole and slot antenna assembly further includes a dielectric gap insert electrically separating the first metal portion of the device case exterior from the second metal portion of the device case exterior, and a modem that drives the electrically-driven monopole antenna at a first frequency and the parasitic slot antenna at a second different frequency.

Described herein are front-end architectures and wireless devices that support uplink carrier aggregation and simultaneous MIMO operations in a plurality of band combinations. The front-end architectures include a combination of low-band, mid-band, high-band, MIMO, and uplink carrier aggregation modules to provide the described functionality. The architectures include an antenna switch module coupled to a first antenna and to a second antenna. The architectures do not use mid-band and high-band switch combining. The architectures use low-band filters in diplexers or triplexers positioned before an antenna switch module.

A cable modem supporting full duplex (FDX) operations. The cable modem includes a transmit circuitry configured to process a transmit signal and a receive circuitry configured to process a receive signal. The receive circuitry includes a switchable analog filter configured to filter the receive signal. The switchable analog filter is configurable for different passband frequencies. The receive circuitry also includes a digital compensation filter configured to compensate a difference in frequency response in a specific frequency band due to switching of the switchable analog filter for a different passband frequency. The cable modem also includes an adjacent channel interference (ACI) cancellation filter and an adjacent leakage interference (ALI) cancellation filter. A digital compensation filter is also used in processing the ACI cancellation signal and the ALI cancellation signal to impose or compensate the difference in frequency response due to the switchable analog filter switching.

Examples described herein include backscatter devices which may transmit orthogonal frequency division multiplexing (OFDM) signals. Techniques for complex analog backscatter are described. Examples of impedance circuitry are described which may be used to provide real and imaginary components of impedance in accordance with inphase and quadrature bits.

A radio frequency digital-to-analog converter (RFDAC) circuit includes an RFDAC array circuit including an array of cells arranged into a plurality of segments. Each segment of the plurality of segments is configured to process input data signals. The RFDAC array circuit is configured to process an input data based on activating a set of segments of the plurality of segments, forming a set of active segments, and when the sign of the input data is changed, deactivate a partially active segment of the set of active segments and activate a sign change segment within the RFDAC array circuit. The sign change segment includes a segment within the plurality of segments of the RFDAC array circuit that is different from the set of active segments.

In a PAM-N receiver, sampler reference levels, DC offset and AFE gain may be jointly adapted to achieve optimal or near-optimal boundaries for the symbol decisions of the PAM-N signal. For reference level adaptation, the hamming distances between two consecutive data samples and their in-between edge sample are evaluated. Reference levels for symbol decisions are adjusted accordingly such that on a data transition, an edge sample has on average, equal hamming distance to its adjacent data samples. DC offset may be compensated to ensure detectable data transitions for reference level adaptation. AFE gains may be jointly adapted with sampler reference levels such that the difference between a reference level and a pre-determined target voltage is minimized.

A controlling system and a controlling method, the controlling system includes: a front end device, configured to generate a first data signal; an adaptor, configured to modulate a power signal according to the first data signal, and output a modulated signal, the power signal being received from the front end device and supplied to the adaptor; and, a back end device, configured to demodulate the modulated signal to obtain the power signal and generate a controlling signal in accordance with the first data signal, the power signal obtain by the back end device being supplied to the back end device, the front end device and the back end device being connected via the adaptor. Therefore, additional power supply is not needed to power up the back end device, the cost of the adaptor is lower.

Systems and methods for combining signals from multiple active wireless receivers are discussed herein. An exemplary system comprises a first downconverter, a phase comparator, a phase adjuster, and a second downconverter. The first downconverter may be configured to downconvert a received signal from a first antenna to an intermediate frequency to create an intermediate frequency signal. The phase comparator may be configured to mix the received signal and a downconverted signal to create a mixed signal, compare a phase of the mixed signal to a predetermined phase, and generate a phase control signal based on the comparison, the downconverted signal being associated with the received signal from the first antenna. The phase adjuster may be configured to alter the phase of the intermediate frequency signal based on the phase control signal. The second downconverter may be configured to downconvert the phase-shifted intermediate frequency signal to create an output signal.