A communication system can include a first transceiver device and a second transceiver device that can communicate digital baseband data via a direct current (DC) power line bus in the wellbore. One or more of the transceivers includes a coupler for the DC power line bus for transceiving data via the DC power line bus with the other transceiver device, modulation circuitry, demodulation circuitry, and compensator circuitry. The compensator circuitry can be communicatively coupled to the coupler for providing an operating point to the coupler in response to both the modulation circuitry and the demodulation circuitry being in an idle state, to reduce effects of low frequency drift and noise in signals.

A radio frequency (RF) filter includes a signal conditioning circuit and a bandstop filter. The signal conditioning circuit receives a broadband RF signal that includes both a jamming signal at a jamming frequency and a signal of interest and generates a plurality of clock signals. Each of the plurality of clock signals has a substantially same frequency as the jamming frequency, but a different phase shift. The bandstop filter receives the RF signal and the plurality of clock signals. The bandstop filter attenuates signals within a bandstop centered at the frequency of the plurality of clock signals. A self-tuning N-path filter is provided.

Processing a resolver signal by a microcontroller includes generating, by a carrier signal generator, a carrier signal for output to a resolver; receiving modulated carrier signals from a resolver via hardware that is external to the microcontroller; integrating, by an integrator, respective integrator input signals which are based on the modulated carrier signals, to generate respective envelope signals, wherein a start of an integration window of the integrator is set with respect to a start of the carrier signal; and determining an angular position sensed by the resolver based on the envelope signals.

A cable modem supporting full duplex (FDX) operations. The cable modem includes a transmit circuitry configured to process a transmit signal and a receive circuitry configured to process a receive signal. The receive circuitry includes a switchable analog filter configured to filter the receive signal. The switchable analog filter is configurable for different passband frequencies. The receive circuitry also includes a digital compensation filter configured to compensate a difference in frequency response in a specific frequency band due to switching of the switchable analog filter for a different passband frequency. The cable modem also includes an adjacent channel interference (ACI) cancellation filter and an adjacent leakage interference (ALI) cancellation filter. A digital compensation filter is also used in processing the ACI cancellation signal and the ALI cancellation signal to impose or compensate the difference in frequency response due to the switchable analog filter switching.

Systems and methods are disclosed for an integrated circuit (IC) comprising an oscillator, an on-off-keying modulator configured to modulate input data coupled to the oscillator, a serial communications transmitter coupled to the on-off-keying modulator, a serial communications receiver coupled to the serial communications transmitter by a set of cables, and an envelope detector coupled to the serial communications receiver. In the IC, power and data are simultaneously delivered across the same set of cables from the serial communications transmitter to the serial communications receiver.

A radio receiver has a front end having a shared amplification path for both radio frequency signals and intermediate frequency signals. In one example, the shared amplification path can include a low noise amplifier and an attenuator. By amplifying both radio frequency (RF) signals and intermediate frequency (IF) signals with the same shared amplification path, gains in power efficiency, and reductions in cost and circuit size can be achieved.

A communication system can include a first transceiver device and a second transceiver device that can communicate digital baseband data via a direct current (DC) power line bus in the wellbore. One or more of the transceivers includes a coupler for the DC power line bus for transceiving data via the DC power line bus with the other transceiver device, modulation circuitry, demodulation circuitry, and compensator circuitry. The compensator circuitry can be communicatively coupled to the coupler for providing an operating point to the coupler in response to both the modulation circuitry and the demodulation circuitry being in an idle state, to reduce effects of low frequency drift and noise in signals.

Crosstalk amelioration systems and methods in a radio frequency front end (RFFE) communication system provide a host or master of an RFFE bus to monitor a weakly-driven data line in the RFFE bus while a clock line is actively providing a clock signal for trigger events at one or more slaves on the RFFE bus. If the host detects noise on the data line that looks like a sequence start condition (SSC) signal, the host further signals on the data line to negate the impact of the false SSC signal and thus avoid misinterpretation by the slaves.

An electroacoustic transducer, comprising a piezoelectric part comprising a piezoelectric material having a first acoustical impedance and an acoustical thickness, a substrate part comprising a material having a second acoustical impedance, and an intermediate part comprising a material having a third acoustical impedance and at least partially sandwiched between the piezoelectric part and the substrate part for acoustical communication therewith. The first acoustical impedance and the second acoustical impedance each has a respective value within a range of values for which the value of third acoustical impedance: is an upper limit if said acoustical thickness is less than 0.4Λ, or is a lower limit if said acoustical thickness is greater than 0.4Λ where Λ is an acoustical wavelength in the material of the piezoelectric part.

Disclosed are a dual-path analog-front-end (AFE) circuit and a dual-path signal receiver characterized by high linearity. The dual-path AFE circuit includes a first reception circuit, a second reception circuit and a multiplexer. The first reception circuit is configured to generate a first analog input signal according to a reception signal in a first mode and configured to be coupled to a first constant-voltage terminal via a first switch circuit in a second mode. The second reception circuit is configured to generate a second analog input signal according to the reception signal in the second mode and configured to be coupled to a second constant-voltage terminal via a second switch circuit in the first mode. The multiplexer is configured to output the first analog input signal in the first mode and output the second analog input signal in the second mode.