Methods and systems are described for receiving, at a data-driven phase comparator circuit, a plurality of data signals in parallel and one or more phases of a local oscillator signal, the data-driven phase comparator circuit comprising a plurality of partial phase comparators, generating a plurality of partial phase-error signals using the partial phase comparators, each partial phase-error signal generated by receiving (i) a corresponding phase of the local oscillator signal and (ii) a corresponding data signal of the plurality of data signals and responsive to a determination that a transition occurred in the corresponding data signal, generating the partial phase-error signal based on a comparison of the corresponding phase of the local oscillator signal and the corresponding data signal, and generating a composite phase-error signal by summing the plurality of partial phase error signals for setting a local oscillator in a lock condition.

Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

A system and a method for testing a high-speed ADC in a DP-QPSK receiver are disclosed. The system includes a simulation module for outputting a data flow and performing signal recovery, an arbitrary waveform generator for receiving the data flow and outputting a high-speed analog signal and a clock signal, a high-speed ADC for converting the high-speed analog signal and the clock signal into a high-speed digital signal, a cache memory circuit for converting the high-speed digital signal into a low-speed digital signal, and a logic analyzer for sending the low-speed digital signal to the simulation module.

A system and a method for testing a high-speed ADC in a DP-QPSK receiver are disclosed. The system includes a simulation module for outputting a data flow and performing signal recovery, an arbitrary waveform generator for receiving the data flow and outputting a high-speed analog signal and a clock signal, a high-speed ADC for converting the high-speed analog signal and the clock signal into a high-speed digital signal, a cache memory circuit for converting the high-speed digital signal into a low-speed digital signal, and a logic analyzer for sending the low-speed digital signal to the simulation module.

According to a first example aspect there is provided a charge pump circuit that includes a first chopper circuit configured to switch first and second chopper circuit outputs between first and second chopper circuit inputs at a chopping frequency, wherein successive input signals at the first chopper circuit input are output alternatively at the first and second chopper circuit outputs in successive cycles of the chopping frequency and successive input signals at the second chopper circuit input are output alternatively at the second and first chopper circuit outputs in successive cycles of the chopping frequency. A differential charge pump is configured to receive the signals output from the first and second chopper circuit outputs and produce corresponding first and second charge pumped signals.

Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.

Methods and systems are described for receiving, at a data-driven phase comparator circuit, a plurality of data signals in parallel and one or more phases of a local oscillator signal, the data-driven phase comparator circuit comprising a plurality of partial phase comparators, generating a plurality of partial phase-error signals using the partial phase comparators, each partial phase-error signal generated by receiving (i) a corresponding phase of the local oscillator signal and (ii) a corresponding data signal of the plurality of data signals and responsive to a determination that a transition occurred in the corresponding data signal, generating the partial phase-error signal based on a comparison of the corresponding phase of the local oscillator signal and the corresponding data signal, and generating a composite phase-error signal by summing the plurality of partial phase error signals for setting a local oscillator in a lock condition.

The present application relates to a Bluetooth communication method and a device. The method may be performed by a first device. The first device may establish Bluetooth connection with a second device. The method may include: performing link communication with the second device according to a first modulation mode; in a case where it is detected that the quality of link communication is less than a preset threshold, adjusting the modulation mode of the first device from the first modulation mode to a second modulation mode, and performing the link communication with the second device according to the second modulation mode. The anti-interference capability of the second modulation mode is greater than that of the first modulation mode.