Methods, systems, and devices for coefficient scaling for high-precision image and video coding are described. A example method of video processing includes performing a conversion between a current block of a video and a bitstream representation of the video according to a rule, wherein the rule specifies that the conversion includes during encoding, skipping applying a forward transform to residual coefficients of the current block prior to including in the bitstream representation, or during decoding, reconstructing residual coefficients of the current block from the bitstream representation without applying an inverse transform, and wherein the rule further specifies that a scale factor is applied to the residual coefficients independent of a size of the current block.

The present disclosure provides video decoding method. An exemplary method includes: decoding a first parameter for a coding unit from a bitstream, and determining a candidate for the coding unit based on the first parameter; determining a value of a second parameter associated with the coding unit based on a value of a second parameter associated with the candidate, wherein the second parameter indicates whether a bi-directional prediction correction is enabled; and in response to the value of the second parameter associated with the coding unit indicating the bi-directional prediction correction being enabled, performing the bi-directional prediction correction on the coding unit.

The present disclosure provides video decoding method. An exemplary method includes: decoding a first parameter for a coding unit from a bitstream, and determining a candidate for the coding unit based on the first parameter; determining a value of a second parameter associated with the coding unit based on a value of a second parameter associated with the candidate, wherein the second parameter indicates whether a bi-directional prediction correction is enabled; and in response to the value of the second parameter associated with the coding unit indicating the bi-directional prediction correction being enabled, performing the bi-directional prediction correction on the coding unit.

To mitigate some problems of the pixel color mapping being used in HDR video decoding of the type of SLHDR, a high dynamic range video encoding circuit (300) is taught, configured to encode a high dynamic range image (IM_HDR) of a first maximum pixel luminance (PB_C1), together with a second image (Im_LWRDR) of lower dynamic range and corresponding lower second maximum pixel luminance (PB_C2), the second image being functionally encoded as a luma mapping function (400) for decoders to apply to pixel lumas (Y_PQ) of the high dynamic range image to obtain corresponding pixel lumas (PO) of the second image, the encoder comprising a data formatter (304) configured to output to a video communication medium (399) the high dynamic range image and metadata (MET) encoding the luma mapping function (400), the functional encoding of the second image being based also on a color lookup table (CL(Y_PQ)) which encodes a multiplier constant (B) for all possible values of the pixel lumas of the high dynamic range image, and the formatter being configured to output this color lookup table in the metadata, characterized in that the high dynamic range video encoding circuit comprises: —a gain determination circuit (302) configured to determine a luma gain value (G_PQ) which quantifies a ratio of an output image luma for a luma position equal to a correct normalized luminance position divided by an output luma for the luma of the pixel of the high dynamic range image, wherein the high dynamic range video encoding circuit comprises a color lookup table determination circuit (303) configured to determine the color lookup table (CL(Y_PQ)) based on values of the luma gain value for various lumas of pixels present in the high dynamic range image. Similarly we teach how the same principles can be embodied in a SLHDR-type video decoder.

To mitigate some problems of the pixel color mapping being used in HDR video decoding of the type of SLHDR, a high dynamic range video encoding circuit (300) is taught, configured to encode a high dynamic range image (IM_HDR) of a first maximum pixel luminance (PB_C1), together with a second image (Im_LWRDR) of lower dynamic range and corresponding lower second maximum pixel luminance (PB_C2), the second image being functionally encoded as a luma mapping function (400) for decoders to apply to pixel lumas (Y_PQ) of the high dynamic range image to obtain corresponding pixel lumas (PO) of the second image, the encoder comprising a data formatter (304) configured to output to a video communication medium (399) the high dynamic range image and metadata (MET) encoding the luma mapping function (400), the functional encoding of the second image being based also on a color lookup table (CL(Y_PQ)) which encodes a multiplier constant (B) for all possible values of the pixel lumas of the high dynamic range image, and the formatter being configured to output this color lookup table in the metadata, characterized in that the high dynamic range video encoding circuit comprises: —a gain determination circuit (302) configured to determine a luma gain value (G_PQ) which quantifies a ratio of an output image luma for a luma position equal to a correct normalized luminance position divided by an output luma for the luma of the pixel of the high dynamic range image, wherein the high dynamic range video encoding circuit comprises a color lookup table determination circuit (303) configured to determine the color lookup table (CL(Y_PQ)) based on values of the luma gain value for various lumas of pixels present in the high dynamic range image. Similarly we teach how the same principles can be embodied in a SLHDR-type video decoder.

A video encoding device for encoding video using inter prediction includes encoding control means 11 for controlling an inter-PU partition type of a CU to be encoded, based on a minimum inter-PU size (PA) and a CU size (PB) of the CU to be encoded. A video decoding device includes decoding control means for controlling an inter-PU partition of a CU to be decoded, based on the minimum inter-PU size (PA) and the size (PB) of the CU to be decoded.

A video encoding device for encoding video using inter prediction includes encoding control means 11 for controlling an inter-PU partition type of a CU to be encoded, based on a minimum inter-PU size (PA) and a CU size (PB) of the CU to be encoded. A video decoding device includes decoding control means for controlling an inter-PU partition of a CU to be decoded, based on the minimum inter-PU size (PA) and the size (PB) of the CU to be decoded.

Methods and systems for frame rate scalability are described. Support is provided for input and output video sequences with variable frame rate and variable shutter angle across scenes, or for input video sequences with fixed input frame rate and input shutter angle, but allowing a decoder to generate a video output at a different output frame rate and shutter angle than the corresponding input values. Techniques allowing a decoder to decode more computationally-efficiently a specific backward compatible target frame rate and shutter angle among those allowed are also presented.

Methods and systems for frame rate scalability are described. Support is provided for input and output video sequences with variable frame rate and variable shutter angle across scenes, or for input video sequences with fixed input frame rate and input shutter angle, but allowing a decoder to generate a video output at a different output frame rate and shutter angle than the corresponding input values. Techniques allowing a decoder to decode more computationally-efficiently a specific backward compatible target frame rate and shutter angle among those allowed are also presented.

There is included a method and apparatus comprising computer code configured to cause a processor or processors to perform obtaining a leaf node of geometry based point cloud compression (G-PCC) data, splitting the leaf node into a plurality of cuboids, deriving separate triangle soups for each of the cuboids, and coding a plurality of flags respectively for each of the edges of each of the cuboids, where the plurality of flags indicate whether vertices of the separate triangle soups are present on ones of the edges.