The present disclosure relates to a solid state imaging device and an electronic device from which a holding unit for holding information in a pixel can be eliminated. When a charge distribution unit distributes a pixel signal SIG to a first ADC, a pixel signal representing only reflection light is divided for allocation. When the charge distribution unit distributes a pixel signal SIG to a second ADC, a pixel signal representing background light and reflection light (partial) is divided for allocation. When the charge distribution unit distributes a pixel signal SIG to a third ADC, a pixel signal representing background light and reflection light (the rest) is divided for allocation. During a period in which no signal is acquired, a discharge transistor functions as an overflow portion for releasing electrical charge. The present disclosure can be applied to, for example, a solid state imaging device used for an imaging device.

In a solid-state imaging device, a first substrate has a plurality of pixels and a plurality of first control signal lines. The plurality of first control signal lines are connected to pixels of each row. The second substrate includes a plurality of second control signal lines and a control circuit. The arrangement of each of the plurality of second control signal lines on the second substrate corresponds to the arrangement of a corresponding one of the plurality of first control signal lines on the first substrate. The connection portion has a plurality of control connections and a plurality of readout connections. Each of the plurality of control connections is connected to one of the plurality of first control signal lines and a corresponding one of the plurality of second control signal lines.

An imaging element incorporates a reading portion that reads out captured image data at a first frame rate, a storage portion that stores the image data, a processing portion that processes the image data, and an output portion that outputs the processed image data at a second frame rate lower than the first frame rate. The reading portion reads out the image data of each of a plurality of frames in parallel. The storage portion stores, in parallel, each image data read out in parallel by the reading portion. The processing portion performs generation processing of generating output image data of one frame using the image data of each of the plurality of frames stored in the storage portion.

In a solid-state imaging element equipped with per-column ADCs, noise is reduced. A test signal source generates a test signal of a predetermined level. An analog-to-digital converter increases/decreases an analog signal according to an analog gain selected from among a plurality of analog gains, and converts the increased/decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, either a test signal or a pixel signal to the analog-to-digital converter. A correction value calculation section obtains, on the basis of the test signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section corrects the digital signal according to the outputted correction value.

In a solid-state imaging element equipped with per-column ADCs, noise is reduced. A test signal source generates a test signal of a predetermined level. An analog-to-digital converter increases/decreases an analog signal according to an analog gain selected from among a plurality of analog gains, and converts the increased/decreased analog signal to a digital signal. An input switching section inputs, as the analog signal, either a test signal or a pixel signal to the analog-to-digital converter. A correction value calculation section obtains, on the basis of the test signal and the digital signal, a correction value for correcting an error in the selected analog gain, and outputs the correction value. A correction section corrects the digital signal according to the outputted correction value.

Provided are an image sensor, an imaging apparatus, and a signal processing method. The image sensor includes a filter array, a pixel array, and a processing circuit. The filter array includes a plurality of filter regions each including a plurality of filter units. The processing circuit is configured to: combine the electrical signals generated by the pixels corresponding to each filter unit for outputting as a combined luminance value and forming a first intermediate image; generate a first color signal, a second color signal, and a third color signal based on the electrical signals generated by the pixels corresponding to each filter region; and process the first color signal, the second color signal, and the third color signal to obtain a plurality of second intermediate images representing chrominance values of the filter region, and fuse the first intermediate image and the second intermediate images to obtain a first target image.

An imaging device includes: a photoelectric converter whose sensitivity changes depending on a value of a voltage to be applied; and a voltage supply circuit that alternately supplies a first voltage and a second voltage, which is different from the first voltage, to the photoelectric converter, in which in a first frame period, a length of a first period from a first point in time at which the first voltage is switched to the second voltage until a second point in time at which the first voltage is switched to the second voltage subsequently to the first point in time differs from a length of a second period from the second point in time until a third point in time at which the first voltage is switched to the second voltage subsequently to the second point in time.

A device includes an offset subtraction unit; an image sensor which receives, for each of a plurality of bright frames, a respective image signal obtained during a respective exposure time of the image sensor, and transmits the same to the offset subtraction unit, and receives, for a dark frame, a respective image signal obtained during a respective exposure time of the image sensor, and transmits the same to the offset subtraction unit; and a control unit which ensures that the image sensor alternately transmits a number of bright frames and one dark frame to the offset subtraction unit. An amount of light by which the respective image signal for each of the bright frames is generated is larger than an amount of light by which the respective image signal for the dark frame is generated; and the offset subtraction unit obtains an offset and subtracts the offset from a signal.

The present disclosure generally pertains to image sensor control circuitry for event-based controlling of an image sensor, the image sensor control circuitry being configured to: obtain events from a plurality of event-based vision elements of an event-based vision sensor; determine event groups based on an event-detection property; and generate an imaging control signal for controlling the imaging elements of the image sensor based on the event groups, for imaging with imaging element groups corresponding to the event groups.

An event-driven sensor including: a pixel array; a column readout circuit coupled to column output lines of the pixel array, the column readout circuit comprising a plurality of groups of column register cells coupled in series with each other to propagate a first flag signal, wherein each column register cell is configured to activate a column event output signal when it receives the first flag signal while the detection of an event is indicated on the column output line; and a first bypassing circuit for each group of column register cells, the first bypassing circuits being coupled in series with each other to propagate the first flag signal.