To improve the sensitivity of the imaging element. An imaging element includes pixels and a light guide wall. The pixels each include: a photoelectric conversion unit arranged in a semiconductor substrate to perform photoelectric conversion on incident light, an on-chip lens that concentrates the incident light on the photoelectric conversion unit, a color filter that transmits incident light having a predetermined wavelength within the concentrated incident light, and an interlayer film disposed between the semiconductor substrate and the color filter. The light guide wall is disposed at a boundary of the pixels and formed in a shape of surrounding the color filter, the light guide wall having an end portion disposed in a recess surrounding the pixel formed in the interlayer film at the boundary of the pixels to guide the incident light.

A solid-state image sensor including a photoelectric conversion region partitioned by trenches, a first semiconductor region surrounding the photoelectric conversion region, a first contact in contact with the first semiconductor region at a bottom portion of the trench, a first electrode in contact with the first contact in the first trench, a second semiconductor region in contact with the first semiconductor region having the same conductive type as the first semiconductor region, a third semiconductor region in contact with the second semiconductor region, between the second semiconductor region and a first surface, and having a second conductive type, a second contact on the first surface in contact with the third semiconductor region, and a second electrode in contact with the second contact, and a second surface at which the first contact and the first electrode are in contact with each other is inclined with respect to the first surface.

To provide an imaging device that suppresses reflection of incident light still more effectively and has excellent sensitivity characteristics. This imaging device includes a semiconductor substrate and a photoelectric conversion section. The semiconductor substrate includes a multi-stepped recess in which a plurality of respective holes defined by first outlines having substantially polygonal shapes is continuous in a thickness direction. The substantially polygonal shapes extend along a first surface orthogonal to the thickness direction and are different from each other in size in a plan view taken along the thickness direction. The photoelectric conversion section generates electric charge through photoelectric conversion. The photoelectric conversion section is defined by a second outline including a portion inclined with respect to the first outlines of the holes in a plan view. The electric charge corresponds to an amount of incident light passing through the multi-stepped recess.

The present disclosure relates to an imaging circuit and an imaging device capable of performing reading at high speed while reducing a circuit scale.

An imaging circuit according to the present disclosure includes a plurality of circuit blocks each including a photoelectric conversion element configured to photoelectrically convert incident light to generate a photocurrent and a current-voltage conversion circuit configured to convert the photocurrent into a voltage signal, a quantizer configured to generate a detection signal of an address event in accordance with a result of comparing the voltage signal supplied from at least one of the plurality of circuit blocks with a threshold, a demultiplexer connected to a subsequent stage of the quantizer, and a plurality of latch circuits connected to different output terminals of the demultiplexer.

An imaging device includes a pixel array part having a plurality of pixels that perform photoelectric conversion, a converter that converts an analog pixel signal output from the pixel array part into digital pixel data, a first signal processing unit that performs first signal processing on the digital pixel data, a second signal processing unit that performs second signal processing that is at least partly shared by the first signal processing on the digital pixel data or data that has been subjected to at least a part of the first signal processing, a recognition processing unit that performs predetermined recognition processing on the basis of output data of the second signal processing unit, and an output interface unit that outputs at least one of output data of the first signal processing unit and the output data of the recognition processing unit.

An imaging device according to an embodiment of the present disclosure includes: a first wiring layer; a first insulating film; a second insulating film; and a first electrically conducive film. The first wiring layer includes a plurality of first wiring lines extending in one direction. The first insulating film is stacked on the first wiring layer. The first insulating film forms a gap between the plurality of adjacent first wiring lines. The second insulating film is stacked on the first insulating film. The second insulating film has a planar surface. The first electrically conducive film is right opposed to at least a portion of the plurality of first wiring lines with the first insulating film and the second insulating film interposed in between.

Some embodiments include a system, comprising: a plurality of pixels; a plurality of data lines coupled to the pixels; a plurality of switches coupling the pixels to the data lines; a plurality of readout circuits coupled to the data lines; control logic coupled to the readout circuits, the control logic configured to, for one of the pixels: acquire a first value for the pixel while the corresponding switch is in an off state; reset the corresponding readout circuit corresponding for the pixel; acquire a second value for the pixel after resetting the readout circuit; turn on the corresponding switch; acquire a third value for the pixel after turning on the corresponding switch; and combine the first value, the second value, and the third value into a combined value for the pixel.

Disclosed is an image sensor. The image sensor includes an active pixel sensor array including first to fourth pixel units sequentially arranged in a column direction, and each of the first to fourth pixel units is composed of a plurality of pixels. A first pixel group including the first and second pixel units is connected to a first column line, and a second pixel group including the third pixel unit and the fourth pixel unit is connected to a second column line. The image sensor includes a correlated double sampling circuit including first and second correlated double samplers and configured to convert a first sense voltage sensed from a selected pixel of the first pixel group and a second sense voltage sensed from a selected pixel of the second pixel group into a first correlated double sampling signal and a second correlated double sampling signal, respectively.

There is provided a semiconductor device in which the inter-wiring capacitance of wiring lines provided in any layout is further reduced. A semiconductor device (1) including: a first inter-wiring insulating layer (120) that is provided on a substrate (100) and includes a recess on a side opposite to the substrate; a first wiring layer (130) that is provided inside the recess in the first inter-wiring insulating layer; a sealing film (140) that is provided along an uneven shape of the first wiring layer and the first inter-wiring insulating layer; a second inter-wiring insulating layer (220) that is provided on the first inter-wiring insulating layer to cover the recess; and a gap (150) that is provided between the second inter-wiring insulating layer and the first wiring layer and the first inter-wiring insulating layer. The second inter-wiring insulating layer has a planarized surface that is opposed to the recess.

An image sensor includes a plurality of pixels and photo gate controller circuitry. Each pixel may transmit a pixel signal, corresponding to a photoelectric signal, in response to a photo gate signal in a frame. The photo gate controller circuitry may generate photo gate signals and transmit photo gate signals to the pixels. The photo gate controller circuitry includes a first delay circuit configured to transmit first delay clock signals each being delayed with respect to a reference clock signal by a certain amount of time and a second delay circuit configured to transmit second delay clock signals each being delayed with respect to the reference clock signal by a certain amount of time. The pixels are each configured to selectively receive signals, as the photo gate signals, among the delay clock signals output from the first delay circuit and the delay clock signals output from the second delay circuit.