Patent classifications
H04Q2213/13527
TECHNOLOGIES FOR MANAGING ALLOCATION OF ACCELERATOR RESOURCES
Technologies for dynamically managing the allocation of accelerator resources include an orchestrator server. The orchestrator server is to assign a workload to a managed node for execution, determine a predicted demand for one or more accelerator resources to accelerate the execution of one or more jobs within the workload, provision, prior to the predicted demand, one or more accelerator resources to accelerate the one or more jobs, and allocate the one or more provisioned accelerator resources to the managed node to accelerate the execution of the one or more jobs. Other embodiments are also described and claimed.
Memory Module for a Data Center Compute Sled
Examples may include a sled for a rack of a data center including physical compute resources. The sled comprises a processor component and a unitary memory module comprising a memory controller and a quantity of memory based on the processor component. The unitary memory module can comprise a quantity of memory based on a number of cores of processor component to which the unitary memory module is communicably coupled.
TECHNOLOGIES FOR DYNAMIC ALLOCATION OF TIERS OF DISAGGREGATED MEMORY RESOURCES
Technologies for dynamically allocating tiers of disaggregated memory resources include a compute device. The compute device is to obtain target performance data, determine, as a function of target performance data, memory tier allocation data indicative of an allocation of disaggregated memory sleds to tiers of performance, in which one memory sled of one tier is to act as a cache for another memory sled of a subsequent tier, send the memory tier allocation data and the target performance data to the corresponding memory sleds through a network, receive performance notification data from one of the memory sleds in the tiers, and determine, in response to receipt of the performance notification data, an adjustment to the memory tier allocation data.
TECHNIQUES FOR MEMORY ACCESS PREFETCHING USING WORKLOAD DATA
Various embodiments are generally directed to an apparatus, method and other techniques for prefetching data for a workload based on memory access information of the workload. For example, an apparatus may include at least one memory, at least one processor, and logic, at least a portion of the logic comprised in hardware, the logic to determine a workload to be executed via the at least one processor, monitor a plurality of memory accesses of the at least one memory by the workload during execution, and generate memory access information for the workload. Other embodiments are described.
TECHNOLOGIES FOR A LOW-LATENCY INTERFACE TO DATA STORAGE
Technologies for a low-latency interface with data storage of a storage sled in a data center are disclosed. In the illustrative embodiment, a storage sled stores metadata including the location of data in a storage device in low-latency non-volatile memory. When accessing data, the storage sled may access the metadata on the low-latency non-volatile memory and then, based on the location determined by the access to the metadata, access the location of the data in the storage device. Such an approach results in only one access to the data storage in order to read the data instead of two.
TECHNIQUES TO ENABLE DISAGGREGATION OF PHYSICAL MEMORY RESOURCES IN A COMPUTE SYSTEM
Various embodiments are generally directed to an apparatus, method and other techniques enable disaggregation of physical memory resources from physical compute resources. For example, embodiments may include a memory interface coupled with the memory controller and a memory module. The memory interface may receive data in parallel via a bus, and convert the received parallel data to send to a memory module of a memory expander sled in serial via a high speed serial link, and receive data in serial via the high speed serial link from the memory module of the memory expander sled, and convert the received serial data to send in parallel to the memory controller via the bus.
TECHNIQUES TO PROVIDE A MULTI-LEVEL MEMORY ARCHITECTURE VIA INTERCONNECTS
Various embodiments are generally directed to an apparatus, method and other techniques to enable memory interfaces to communicate read request, write requests, and data via an interconnect. Embodiments, include processing write requests to write data into memory coupled via an interconnect and processing read requests to read data from memory coupled via an interconnect. In embodiments, the data may be compressed data based on a compression mechanism and communicated in a fabric packet including a compression mechanism indicator, the compressed data, and an address, the compression mechanism indicator to indicate which compression mechanism is applied to the data.
TECHNIQUES TO SUPPORT MULTIPLE INTERCONNECT PROTOCOLS FOR A COMMON SET OF INTERCONNECT CONNECTORS
Embodiments may be generally direct to apparatuses, systems, method, and techniques to determine a configuration for a plurality of connectors, the configuration to associate a first interconnect protocol with a first subset of the plurality of connectors and a second interconnect protocol with a second subset of the plurality of connectors, the first interconnect protocol and the second interconnect protocol are different interconnect protocols and each comprising one of a serial link protocol, a coherent link protocol, and an accelerator link protocol, cause processing of data for communication via the first subset of the plurality of connectors in accordance with the first interconnect protocol, and cause processing of data for communication via the second subset of the plurality of connector in accordance with the second interconnect protocol.
AUTOMATED DATA CENTER MAINTENANCE
Techniques for automated data center maintenance are described. In an example embodiment, an automated maintenance device may comprise processing circuitry and non-transitory computer-readable storage media comprising instructions for execution by the processing circuitry to cause the automated maintenance device to receive an automation command from an automation coordinator for a data center, identify an automated maintenance procedure based on the received automation command, and perform the identified automated maintenance procedure. Other embodiments are described and claimed.
TECHNOLOGIES FOR PERFORMING LOW-LATENCY DECOMPRESSION WITH TREE CACHING
Technologies for performing low-latency decompression include a managed node to parse, in response to a determination that a read tree descriptor does not match a cached tree descriptor, the read tree descriptor to construct one or more tables indicative of codes in compressed data. Each code corresponds to a different symbol. The managed node is further to decompress the compressed data with the one or more tables and store the one or more tables in association with the read tree descriptor in a cache memory for subsequent use.