Apparatus and methods of automatically trimming a PCB-based LC circuit. The apparatus may comprise an interface to a printed circuit board (PCB). The PCB may include a PCB inductor and a PCB capacitor to form an LC circuit. The LC circuit may have an LC circuit frequency. The apparatus may comprise a variable capacitor communicatively coupled to the interface and configured to adjust an effective capacitance of the LC circuit.

An electronic component includes a body having a side surface, coil conductor layers wound along main surfaces parallel to the side surface, and capacitor conductor layers each having a substantially plate-like shape parallel to the side surface. The coil conductor layers and the capacitor conductor layers are arranged in a widthwise direction perpendicular to the side surface. The capacitor conductor layers include first and second capacitor conductor layers adjacent to each other in the widthwise direction. The coil conductor layers include a first coil conductor layer that is in the same layer as the first capacitor conductor layer and a second coil conductor layer that is in the same layer as the second capacitor conductor layer. The shortest distance between the first coil conductor layer and the first capacitor conductor layer is larger than the shortest distance between the second coil conductor layer and the second capacitor conductor layer.

An electronic component includes a body having a side surface, coil conductor layers wound along main surfaces parallel to the side surface, and capacitor conductor layers each having a substantially plate-like shape parallel to the side surface. The coil conductor layers and the capacitor conductor layers are arranged in a widthwise direction perpendicular to the side surface. The capacitor conductor layers include first and second capacitor conductor layers adjacent to each other in the widthwise direction. The coil conductor layers include a first coil conductor layer that is in the same layer as the first capacitor conductor layer and a second coil conductor layer that is in the same layer as the second capacitor conductor layer. The shortest distance between the first coil conductor layer and the first capacitor conductor layer is larger than the shortest distance between the second coil conductor layer and the second capacitor conductor layer.

An inductor component includes a main body formed in a flat-plate shape and including a magnetic layer; an inductor wiring line disposed on a plane inside the main body; a first vertical wiring line that extends, from a pad portion which is an end portion of the inductor wiring line, in a first direction to pass through the inside of the main body, and is exposed on a first principal surface side of the main body; a second vertical wiring line that extends, from the pad portion of the inductor wiring line, in a second direction to pass through the inside of the main body, and is exposed on a second principal surface side of the main body; and an insulation layer of a non-magnetic body. The first vertical wiring line includes a via conductor and a columnar wiring line. The second vertical wiring line includes a columnar wiring line.

A electronic component including a first protective layer covering the substrate and the conductive tract, a second protective layer covering at least a portion of the first protective layer, wherein the second protective layer includes Parylene, and a third protective layer covering at least a portion of the second protective layer.

The present strain gauge includes a substrate having flexibility; a resistor formed from a material containing at least one of chromium and nickel, on the substrate; a pair of wiring patterns formed on the substrate and electrically connected to both ends of the resistor; and a pair of electrodes formed on the substrate and electrically connected to the pair of wiring patterns, respectively. The wiring patterns include a first layer extending from the resistor, and a second layer having a lower resistance than the first layer and layered on the first layer. On the substrate, an electronic component mounting area is demarcated, on which an electronic component electrically connected to the electrodes is mounted.

An electric lock includes a housing, a keypad module and a lock assembly. The keypad module is arranged on the housing. The keypad module includes a key panel, an electrode pad, a circuit board and a spacer. The key panel is marked with a plurality of key characters. The electrode pad is arranged on an inner side of the key panel, and the electrode pad has a plurality of key electrodes corresponding to the plurality of key characters respectively. The circuit board includes a plurality of key circuits. Each of the key circuits is configured to generate a key signal when contacting a corresponding key electrode. The spacer is configured to form a gap between each of the key circuits and the corresponding key electrode. The lock assembly is electrically connected to the keypad module for performing locking and unlocking operations according to the key signal.

A circuit interrupter including a line conductor, a neutral conductor, a printed-circuit board coil, and a test circuit. The printed-circuit board coil has an aperture configured to receive the line conductor. The test circuit is electrically connected to the printed-circuit board coil. The test circuit is configured to determine an arc fault condition based on a signal of the printed-circuit board coil.

An electronics package is disclosed. The electronics package includes a first radio frequency (RF) substrate layer, a second RF substrate layer, and a plurality of conductive layers disposed adjacent to at least one of the first RF substrate layer and the second RF substrate layer and including an inner conductive layer disposed between and adjacent to both the first RF substrate layer and the second RF substrate layer. The inner conductive layer bonds the first RF substrate layer to the second RF substrate layer. The electronics package also includes a plurality of conductive interconnects extending through the first RF substrate layer and the second RF substrate layer and electrically coupled between at least two of the plurality of conductive layers.

An electronics package is disclosed. The electronics package includes a first radio frequency (RF) substrate layer, a second RF substrate layer, and a plurality of conductive layers disposed adjacent to at least one of the first RF substrate layer and the second RF substrate layer and including an inner conductive layer disposed between and adjacent to both the first RF substrate layer and the second RF substrate layer. The inner conductive layer bonds the first RF substrate layer to the second RF substrate layer. The electronics package also includes a plurality of conductive interconnects extending through the first RF substrate layer and the second RF substrate layer and electrically coupled between at least two of the plurality of conductive layers.