A system, method and computer program product for automated circuit trace generation and reconfiguration on a circuit board, includes a circuit board having a plurality of contact points; a switching matrix coupled to the contact points of the circuit board, and connected to a computer. The switching matrix is programmed by the computer to generate one or more circuit traces onto the contact points of the circuit board.

One embodiment of the present disclosure provides a system for determining a hybrid-manufacturing plan for manufacturing an integrated circuit (IC). During operation, the system can obtain a set of hybrid-manufacturing constraints for manufacturing the IC. The set of hybrid-manufacturing constraints can include a set of primitives, a set of atoms, and an atom end-state vector. An atom can correspond to a unit of spatial volume of the IC. A primitive can represent an additive, subtractive, or a mixed manufacturing process corresponding to one or more atoms of the IC. Next, the system can determine a plurality of feasible hybrid-manufacturing plans based on the set of manufacturing constraints. Each feasible hybrid-manufacturing plan can represent an ordering of the set of primitives that satisfies the atom end-state vector. The system can then determine costs for manufacturing the IC using the plurality feasible hybrid-manufacturing plans. The system can determine, based on the costs, an optimized hybrid-manufacturing plan for manufacturing the IC.

A component carrier includes a stack having a first electrically insulating layer structure and a first electrically conductive layer structure arranged on the first electrically insulating layer structure. The first electrically insulating layer structure has at least one first covered portion, which is covered by the first electrically conductive layer structure, and at least one first non-covered portion, which is not covered by the first electrically conductive layer structure. The first electrically insulating layer structure defines a recess at the at least one first non-covered portion.

A transmission path design assistance system assisting in the design of a transmission path with different reflection specification values for each frequency is obtained. The transmission path design assistance system includes: an acquisition unit to acquire reflection specification values of a reflection characteristic of a transmission path to be designed and a constraint of characteristic impedance distribution of the transmission path; and a computation processing unit including: a reflection characteristic calculation unit to calculate the reflection characteristic from inputted characteristic impedance distribution; a reflection characteristic modification unit to modify, on the basis of the reflection specification values acquired by the acquisition unit, the reflection characteristic calculated by the reflection characteristic calculation unit; a characteristic impedance distribution calculation unit to calculate characteristic impedance distribution from the reflection characteristic modified by the reflection characteristic modification unit; and a characteristic impedance distribution modification unit to modify, on the basis of the constraint acquired by the acquisition unit, the characteristic impedance distribution calculated by the characteristic impedance distribution calculation unit and output it to the reflection characteristic calculation unit.

A system to access one or more user profiles that govern one or more vehicle functions. The system cooperates with a processor and verification module which are adapted to verify, using one or more of biometric information, gesture recognition, facial recognition and device identification information, that a user has authority to access the one or more user profiles, where the one or more profiles are stored in one or more of a vehicle, a cloud and a communications device. An edit module is further provided and adapted to allow the user to make one or more edits to the one or more user profiles.

A design method for displaying a DRC in a classification manner in a PCB design is provided. The design method includes: acquiring layer information contained in a current design, adding the acquired layer information to a DRC Layer menu in a pop up window, acquiring a DRC Type contained in the current design and adding the processed DRC Type to a DRC Type menu in the pop up window after processing the acquired DRC Type; creating an updating function, to update a DRC Type menu list in response to an input action of a user; acquiring an attribute of each item in a DRC Layer menu list and the DRC Type menu list, and inserting the acquired attribute into the updated DRC Layer menu list and the updated DRC Type menu list, to form a feature parameter list.

A circuit board component layout determination method includes the steps of: (1) simulating the placement of components by a circuit board layout software program; (2) performing a circuit board component layout density analysis to obtain a circuit board component layout density percentage; (3) determining whether or not the simulated placement of components is feasible according to the circuit board component layout density percentage, and if yes, carrying out step (4); and (4) placing the components into the circuit board. The method uses a circuit board layout software program and a spreadsheet or a database to calculate the statistics of an area of a circuit board that can be laid and an area of the circuit board that cannot be laid, so as to analyze and determine the implementability of a component layout, and improve the control, efficiency and cost-effective of the component layout of the circuit board.

There is a need for more effective and efficient printed circuit board (PCB) design. This need can be addressed by, for example, solutions for performing automated PCB component estimation. In one example, a method includes identifying a plurality of initial component estimations for the PCB; performing a shadow detection segmentation using the plurality of initial component estimations, a non-direct-lighting image, and one or more direct-lighting images to generate a first set of detected PCB components; performing a super-pixel segmentation using the plurality of initial component estimations and the non-direct-lighting-image to generate a second set of detected PCB components; and generating a bill of materials for the PCB based at least in part on the first set of detected PCB components and the second set of detected PCB components.

An assembling method for a multi-core cable having a plurality of electrical insulated wires is designed to connect one-end-portions of the electrical insulated wires to electrode patterns, respectively, of one circuit board, correspondingly connect other-end-portions of the electrical insulated wires to electrode patterns, respectively, of the other circuit board, compute intersection coefficients on one end side and the other of the cable, and iterate interchanging connecting destinations for the one-end-portions of the electrical insulated wires, correspondingly interchanging connecting destinations for the other-end-portions of the electrical insulated wires, and computing the intersection coefficients on the one end side and the other of the cable. The connecting destinations for the electrical insulated wires to the electrode patterns are determined in such a manner that a maximum intersection coefficient denoting either larger one of the respective intersection coefficients of the one end side and the other of the cable is made small.

The embodiments of the present disclosure provide a method and apparatus for simulating a flexible panel. The method comprises: establishing a geometric model of the flexible panel; cutting a layer adjacent to a layer where a wiring region is located in the geometric model of the flexible panel; partitioning the following regions or layers in the cut geometric model into grid cells: the wiring region, layers other than the layer where the wiring region located and the layer adjacent to the layer where the wiring region is located, and regions obtained by cutting the layer adjacent to the layer where the wiring region is located; and simulating the flexible panel based on the partition.