Patent classifications
H05K3/0005
ROUTING METHOD FOR CIRCUIT BOARD
The present invention discloses a routing method for a circuit board, which is suitable for planning a plurality of traces to connect a plurality of first contacts of a first trace layer and a plurality of second contacts of a second trace layer, and at least includes the following steps: providing a plurality of virtual paths between the first contacts and the second contacts, and providing a plurality of virtual grid points on the virtual paths; setting a plurality of first serial numbers of the first contacts and a plurality of second serial numbers of the second contacts; dividing the traces into a first group, a second group and a third group according to a plurality of contact serial number differences between the second serial numbers and the first serial numbers; and providing a via hole of each trace on the virtual grid point.
AUTOMATIC PROCESSING METHOD FOR PRINTED CIRCUIT BOARD DATA AND ELECTRONIC DEVICE
An automatic processing method for printed circuit board data and an electronic device are provided. The automatic processing method for printed circuit board data includes steps as follows: capturing a first image information on a display device by using an image information capturing circuit, in which the first image information includes one or more first operation area image information; and moving an indicator to one side of the one or more first operation area image information by using the indicator control circuit for performing a first operation action, until each of the one or more first operation area image information has the corresponding first operation action performed thereon. The first operation area image information includes two copper foils. The two copper foils have a gap therebetween. The first operation action is a copper scraping action.
Printed circuit board design and manufacturing
A spatial model of a printed circuit board assembly is generated based on an input file. The spatial model is used to determine a spatial feature not directly specified in the input file. A manufacturing parameter is determined based at least in part on the determined spatial feature. A proposal to manufacture the printed circuit board assembly is generated programmatically based at least in part on the determined manufacturing parameter.
Traceability of subsequent layer structure manufacturing of main body for component carriers by means of laterally and vertically displaced information carrying structures
A component carrier related body which includes a stack with a plurality of electrically conductive and/or electrically insulating layer structures, and at least two information carrying structures formed vertically displaced on at least two different of the layer structures, wherein at least two of the at least two information carrying structures are laterally displaced in a plan view on the stack.
Insulating unit for circuit board
A circuit board has an upper face and a lower face. The circuit board comprises at least two circuits, with each of the at least two circuits comprising at least one conductor track and at least one current carrying electronic component. The circuit board has at least one through-hole which is provided with at least one insulating unit. The at least one insulating unit is arranged in the at least one through-hole and so is mechanically connected to the circuit board and thus is positioned between a first circuit and at least one second circuit of the circuit board.
MODIFIED INTERNAL CLEARANCE(S) AT CONNECTOR PIN APERTURE(S) OF A CIRCUIT BOARD
A method of fabricating a multilayer circuit board is provided which includes forming a layer of a the multilayer circuit board with an internal clearance region having a modified voltage-to-ground clearance of conductive material adjacent to an aperture of the multilayer circuit board. The modified voltage-to-ground clearance of conductive material is based on a configuration of a connector pin to be press-fit connected within the aperture of the multilayer circuit board, and the internal clearance region is enlarged in a direction of greatest normal force outward from the aperture with insertion of the connector pin into the aperture.
METHODS AND SYSTEMS FOR PRINTED CIRCUIT BOARD COMPONENT PLACEMENT AND APPROVAL
An aspect of the disclosed embodiments is a method for printed circuit board (PCB) component placement comprising: graphically displaying, on a display device, PCB design features of a PCB design; and providing a user interface control for designating one or more of the PCB design features as electrical contacts for a first selected electrical component. Other aspects are disclosed.
METHODS AND SYSTEMS FOR PRINTED CIRCUIT BOARD COMPONENT PLACEMENT AND APPROVAL
An aspect of the disclosed embodiments is a method for printed circuit board (PCB) component placement comprising: graphically displaying, on a display device, PCB design features of a PCB design; and providing a user interface control for designating one or more of the PCB design features as electrical contacts for a first selected electrical component. Other aspects are disclosed.
METHODS AND SYSTEMS FOR PRINTED CIRCUIT BOARD COMPONENT PLACEMENT AND APPROVAL
An aspect of the disclosed embodiments is a method for printed circuit board (PCB) component placement comprising: graphically displaying, on a display device, PCB design features of a PCB design; and providing a user interface control for designating one or more of the PCB design features as electrical contacts for a first selected electrical component. Other aspects are disclosed.
Methods, systems, and computer program product for implementing a net as a transmission line model in a schematic driven extracted view for an electronic design
Disclosed are methods, systems, and articles of manufacture for implementing a schematic circuit design component as a transmission line model in a schematic driven extracted view for an electronic design. These techniques identify a schematic circuit component design form a schematic design of an electronic design and identify or determine layout device information of a layout circuit component design corresponding to the schematic circuit component design. An extracted view may be generated or identified for the electronic design at least by using a transmission line model based in part or in whole upon connectivity information or a hierarchical structure of the electronic design. The electronic design may then be modified or updated based in part or in whole upon results of performing one or more analyses on the extracted view with the transmission line model.