A circuit board includes a first dielectric material, a second dielectric material, a third dielectric material, a first external circuit layer, a second external circuit layer, multiple conductive structures, and a conductive via structure. Dielectric constants of the first, the second and the third dielectric materials are different. The first and the second external circuit layers are respectively disposed on the first and the third dielectric materials. The conductive via structure at least penetrates the first and the second dielectric materials and is electrically connected to the first and the second external circuit layers to define a signal path. The conductive structures are electrically connected to each other and surround the first, the second and the third dielectric materials. The conductive structures are electrically connected to the first and the second external circuit layers to define a ground path surrounding the signal path.

Membrane unit for a speaker device, the membrane unit (1) comprising a membrane (2) and at least two coils (3). The respective longitudinal axes of the at least two coils (3) are arranged in parallel along a main axis (A), a main surface being formed perpendicular to the main axis (A). The at least two coils (3) are positioned adjacent to each other and mechanically connected to the membrane (2), the membrane (2) being substantially flat and having a major surface (S) parallel to the main surface. Wiring (4, 5, 6) to the at least two coils (3) is provided at least partly on a flat part of the membrane (2).

A package substrate and a manufacturing method thereof, the method including: forming a package substrate by a first dielectric layer formed by weaving at least fiberglass of a first width and a second dielectric layer formed by weaving at least fiberglass of a second width. The second width is different from the first width, and the weaving direction of the fiberglass in the first dielectric layer is 90° relative to the weaving direction of the fiberglass in the second dielectric layer.

A circuit board includes a board including a first surface and a second surface opposing the first surface, where the board includes at least one conductive layer and at least insulating layer, a plurality of electronic elements disposed on the first surface of the board, and a plurality of resistive pads disposed on the second surface of the board and electrically connected to at least one selected from the electronic elements. The resistive pads have a resistance of zero ohm.

A wiring board includes a first insulating layer, a pad formed on one surface of the first insulating layer, a second insulating layer, formed on the one surface of the first insulating layer, and including an opening exposing the pad, and a reinforcing metal layer formed in contact with the first insulating layer, and provided around the pad so as to be separated from the pad in a plan view. The pad is disposed inside the opening without making contact with the second insulating layer. An end, on a side of the first insulating layer, in a portion of an inner side surface of the opening of the second insulating layer makes contact with the reinforcing metal layer, and an end in another portion of the inner side surface of the opening of the second insulating layer makes contact with the one surface of the first insulating layer.

A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.

An aspect includes one or more board layers. A first chip cavity is formed within the one or more board layers, wherein a first Josephson amplifier or Josephson mixer is disposed within the first chip cavity. The first Josephson amplifier or Josephson mixer comprises at least one port, each port connected to at least one connector disposed on at least one of the one or more board layers, wherein at least one of the one or more board layers comprises a circuit trace formed on the at least one of the one or more board layers.

A flexible electronics assembly includes a single-piece substrate having two regions of rigidity separated by a localized region of flexibility. The localized region of flexibility has a lower rigidity than the two regions of rigidity. The two regions of rigidity are angularly deflectable from a planar configuration of the single-piece substrate to a non-planar configuration of the single-piece substrate by hinging action of the localized region of flexibility. At least one electronic component is mounted on at least one of the two regions of rigidity.

A manufacturing method of a circuit board is provided. A first carrier board included a substrate and a first conductive layer is provided, and the first conductive layer is located on a first surface of the substrate. A stainless steel layer is sputtered on the first conductive layer. An insulating layer is formed to cover a peripheral region of the stainless steel layer and expose a central region. A circuit structure layer is formed on the central region exposed by the insulating layer. A bottom surface of the circuit structure layer is connected to the first carrier board. A transferring procedure is performed to adhere a top surface of the circuit structure layer onto an adhesive layer of a second carrier board. The first carrier board is separated with the circuit structure layer to transfer the circuit structure layer onto the second carrier board, and expose the bottom surface of the circuit structure layer. The manufacturing method of the circuit board of the present invention is safer and simpler, may effectively reduce the manufacturing costs and improve the product yields.

Methods for forming electrical circuitries on three-dimensional (3D) structures and devices made using the methods. A method includes forming selectively shaped 3D structures using additive manufacturing. The method includes forming undercuts on upper-level pedestals of the 3D structures that effectively act as overhanging deposition masks for selectively preventing deposition of a selected material on a corresponding portions of lower levels. The method includes simultaneously forming and electrically isolating materials directionally deposited on the 3D structure.