H05K3/007

PHOTOSENSITIVE RESIN COMPOSITION, PHOTOSENSITIVE ELEMENT, CURED PRODUCT, SEMICONDUCTOR DEVICE, METHOD FOR FORMING RESIST PATTERN, AND METHOD FOR PRODUCING CIRCUIT SUBSTRATE

A photosensitive resin composition comprises: a resin having a phenolic hydroxyl group; a photosensitive acid generator; a compound having at least one selected from the group consisting of an aromatic ring, a heterocycle and an alicycle, and at least one selected from the group consisting of a methylol group and an alkoxyalkyl group; and an aliphatic compound having two or more functional groups, the functional groups being at least one functional group selected from the group consisting of an acryloyloxy group, a methacryloyloxy group, a glycidyloxy group, an oxetanyl alkyl ether group, a vinyl ether group and a hydroxyl group, wherein the photosensitive acid generator is a sulfonium salt containing an anion having at least one skeleton selected from the group consisting of a tetraphenylborate skeleton, an alkylsulfonate skeleton having 1 to 20 carbon atoms, a phenylsulfonate skeleton and a 10-camphorsulfonate skeleton.

METHOD OF FILLING VIAS WITH INK
20170265311 · 2017-09-14 ·

A method for selective processing of a panel, the method may include receiving a panel that has a bottom side and a top side and comprises a first group of drilled holes and a second group of drilled holes; at least partially sealing a bottom of any through hole of the first group; filling, by a selective filing process, any drilled hole of the first group that has a top opening to provide at least partially filled drilled holes of the first group without filling the second group of drilled holes; and plugging, by a selective plugging process, a top of any drilled hole of the first group.

OBJECT STAGE AND HOT PRESSING APPARATUS
20170252961 · 2017-09-07 ·

An object stage and a hot pressing apparatus are disclosed. The object stage includes a base (1) and a support device (2) fixed on the base (1), wherein the support device (2) includes a plurality of detachable support sub-devices (21): the support device is configured to allow a printed circuit board (3) with at least one protruding structure (4) to be placed thereon, and no support sub-device (21) is disposed at a position on the support device (2) corresponding to the protruding structure (1). The object stage reduces manufacture cost, saves production time and improves production efficiency.

Semiconductor substrate and method for manufacturing the same

A semiconductor substrate and a manufacturing method thereof are provided. The semiconductor substrate includes a dielectric layer, a circuit layer, a first protection layer and a plurality of conductive posts. The dielectric layer has a first surface and a second surface that are opposite to each other. The circuit layer is embedded in the dielectric layer and is exposed from the first surface. The first protection layer covers a portion of the first circuit layer and defines a plurality of holes that expose a remaining portion of the first circuit layer. The conductive posts are formed in the holes.

Method for manufacturing coreless substrate

A temporary carrier according to an embodiment of the present invention may include a core layer, a first Cu foil layer and a second Cu foil layer on surfaces of both sides of the core layer. Each of the first Cu foil layer and the second Cu foil layer may include double Cu foils which are physically attached together.

TEMPORARY CARRIER AND METHOD FOR MANUFACTURING CORELESS SUBSTRATE THEREBY

A temporary carrier according to an embodiment of the present invention may include a core layer, a first Cu foil layer and a second Cu foil layer on surfaces of both sides of the core layer. Each of the first Cu foil layer and the second Cu foil layer may include double Cu foils which are physically attached together.

PRE-PACKAGED CHIP, METHOD OF MANUFACTURING A PRE-PACKAGED CHIP, SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING A SEMICONDUCTOR PACKAGE

A pre-packaged chip includes a chip having at least one electrical top contact at a top side of the chip and at least one electrical bottom contact at a bottom side, a first laminate layer on the top side, a second laminate layer on the bottom side, the first laminate layer and the second laminate layer being laminated together to sandwich the chip therebetween, a first metal layer on the first laminate layer and electrically contacted to the at least one electrical top contact via at least one top contact hole through the first laminate layer, and a second metal layer on the second laminate layer and electrically contacted to the at least one electrical bottom contact via at least one bottom contact hole through the second laminate layer. The pre-packaged chip is free from any contact hole extending from the first metal layer to the second metal layer.

Method for preparing patterned coverlay on substrate

The present invention relates to a method for preparing a patterned polyimide coverlay on a substrate. The method includes: providing a polyimide dry film including a carrier and a non-photosensitive polyimide layer on the carrier, the non-photosensitive polyimide layer containing (i) a polyimide precursor or soluble polyimide and (ii) a solvent; forming a predetermined pattern in the polyimide dry film; laminating the patterned polyimide dry film onto a substrate in such a manner that the non-photosensitive polyimide layer faces the substrate; and forming a patterned polyimide coverlay by heating.

FLEXIBLE ELECTRONIC STRUCTURE AND METHOD FOR PRODUCING SAME

A flexible electronic structure includes a first film, made of a first polymer or glass, and a second film, made of a second polymer, in which at least one electronic component is arranged. The second film covers the first film. The flexible electronic structure also includes at least one electrically conductive track arranged between the first film and the second film, and each electrically connected to one of the electronic components, by a respective interconnection element. Optionally, the flexible electronic structure includes a third film, made of a third polymer or glass, covering the second film. The interconnection element is arranged near the neutral plane of the structure, and the structure includes at least one compensation layer, so as to position the neutral plane at a desired location.

Component Carrier and Method of Manufacturing the Same

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A cavity is formed in the stack. A component in the cavity has a stepped profile at at least one of its main surfaces. A resin clamping structure laterally engages the component and extends up to a step of the stepped profile. A method of manufacturing such a component carrier is also provided.