A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.

A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die.

The first present invention is a graphite sheet having a thickness of not more than 9.6 μm and more than 50 nm and a thermal conductivity along the a-b plane direction at 25° C. of 1950 W/mK or more. The second present invention is a graphite sheet having a thickness in a range of less than 9.6 μm and 20 nm or more, an area of 9 mm2 or more, and a carrier mobility along the a-b plane direction at 25° C. of 8000 cm2/V.Math.sec or more.

Provided is a method for manufacturing a wiring board that forms a wiring layer having favorable adhesion without a resin resist pattern. A method prepares a substrate with seed-layer including: a underlayer on the surface of an insulating substrate; and a seed layer on the surface of the underlayer, the seed layer having a predetermined pattern and containing metal; presses a solid electrolyte membrane against the seed layer and the underlayer, and applies voltage between an anode and the underlayer to reduce metal ions in the membrane and form a metal layer on the surface of the seed layer; and removes an exposed region without the seed layer and the metal layer of the underlayer to form a wiring layer including the underlayer, the seed layer and the metal layer on the surface of the substrate.

A method is used to provide an electrically-conductive polyaniline pattern by providing a uniform layer of a photocurable composition on a substrate. The photocurable composition comprises a water-soluble reactive polymer comprising (a) greater than 40 mol % of recurring units comprising sulfonic acid or sulfonate groups, and (b) at least 5 mol % of recurring units comprising a pendant group capable of crosslinking via [2+2] photocycloaddition. The photocurable composition is exposed to cause crosslinking via [2+2] photocycloaddition of the (b) recurring units, thereby forming a crosslinked polymer. Any remaining water-soluble reactive polymer is removed. The crosslinked polymer is contacted with an aniline reactive composition having aniline monomer and up to 0.5 molar of an aniline oxidizing agent, thereby forming an electrically-conductive polyaniline disposed either within, on top of, or both within and on top of, the crosslinked polymer.

A method is used to provide an electrically-conductive polyaniline pattern by providing a uniform layer of a photocurable composition on a substrate. The photocurable composition comprises a water-soluble reactive polymer comprising (a) greater than 40 mol % of recurring units comprising sulfonic acid or sulfonate groups, and (b) at least 5 mol % of recurring units comprising a pendant group capable of crosslinking via [2+2] photocycloaddition. The photocurable composition is exposed to cause crosslinking via [2+2] photocycloaddition of the (b) recurring units, thereby forming a crosslinked polymer. Any remaining water-soluble reactive polymer is removed. The crosslinked polymer is contacted with an aniline reactive composition having aniline monomer and up to 0.5 molar of an aniline oxidizing agent, thereby forming an electrically-conductive polyaniline disposed either within, on top of, or both within and on top of, the crosslinked polymer.

A method of manufacture of a circuit board without annular through-hole rings and thus allowing a higher component density includes a base layer, a first wire pattern layer, and a second wire pattern layer on both sides of the base layer. A portion of the base layer not covered by the first wire pattern layer defines at least one first hole. The circuit board further includes a wire layer. The wire layer includes at least a first portion and a second portion connecting to the first portion. The first portion is filled in the first hole. The second portion is formed on the first portion extending away from the base layer. A diameter of the second portion is less than an aperture diameter of the first hole. The wire layer is electrically conductive between the first wire pattern layer and the second wire pattern layer through the first portion.

A method of manufacture of a circuit board without annular through-hole rings and thus allowing a higher component density includes a base layer, a first wire pattern layer, and a second wire pattern layer on both sides of the base layer. A portion of the base layer not covered by the first wire pattern layer defines at least one first hole. The circuit board further includes a wire layer. The wire layer includes at least a first portion and a second portion connecting to the first portion. The first portion is filled in the first hole. The second portion is formed on the first portion extending away from the base layer. A diameter of the second portion is less than an aperture diameter of the first hole. The wire layer is electrically conductive between the first wire pattern layer and the second wire pattern layer through the first portion.

A method of manufacturing a printed circuit board or a sub-assembly thereof by coupling at least two elements of insulating materials with different properties on adjacent side surfaces and covering the elements with a layer of conductive material and building up at least one further layer at least partly overlapping the at least two elements.

A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.