H05K3/02

FLEXIBLE INTERCONNECT CIRCUITS AND METHODS OF FABRICATION THEREOF

Provided are flexible interconnect circuit assemblies and methods of fabricating thereof. In some examples, a flexible interconnect circuit comprises multiple circuit portions, which are monolithically integrated. During the fabrication, some of these circuit portions are folded relative to other portions, forming a stack in each fold. For example, the initial orientation of these portions can be selected such that smaller sheets can be used for circuit fabrication. The portions are then unfolded into the final design configuration. In some examples, the assembly also comprises a bonding film and a temporary support film attached to the bonding film such that the two circuit portions at least partially overlap with the bonding film and are positioned between the bonding film and temporary support film. In some examples, at least some circuit portions extend past the boundary of the bonding film and are coupled to connectors.

Thermosetting resin composition, and prepreg, laminate and printed circuit board using same

Provided are a thermosetting resin composition, and a prepreg, a laminate and a printed circuit board using same. The thermosetting resin composition comprises a resin component comprising a modified cycloolefin copolymer and other unsaturated resins. The modified cycloolefin copolymer is a reaction product of maleic anhydride and a cycloolefin copolymer; the cycloolefin copolymer is a copolymerization product of a monomer A and a monomer B; the monomer A is selected from one of or a combination of at least two of norbornene, cyclopentadiene, dicyclopentadiene, tricyclopentadiene, and (I); and the monomer B is selected from one of or a combination of at least two of C2-C3 olefins and C2-C3 alkynes. The laminate prepared by using the provided thermosetting resin composition has good dielectric properties, peel strength and thermal resistance, and can satisfy the current requirements of properties for printed circuit board substrates in the field of high-frequency and high-speed communications.

PHOTOSENSITIVE FIBER-FORMING COMPOSITION AND METHOD FOR FORMING FIBER PATTERN

A method for producing a metal pattern by processing a substrate having on its surface a metal layer with a photosensitive fiber having a specific composition, a method for producing a metal pattern, and a composition for producing the photosensitive fiber. The photosensitive fiber contains a positive photosensitive material. The positive photosensitive material may contain a novolac resin, etc. The method for producing a metal pattern includes a first step of forming a fiber layer of photosensitive resin on a substrate having on its surface a metal layer; a second step of exposing the fiber layer to light via a mask; a third step of developing the fiber layer with a developer to thereby form a photosensitive fiber pattern; and a fourth step of etching the metal layer with an etchant and removing the photosensitive fiber, to thereby form a network metal pattern.

Silver nanowire-mesh (Ag NW-mesh) electrode and manufacturing method thereof

According to one aspect of the present invention, a silver nanowire mesh (Ag NW-mesh) electrode and a fabricating method thereof. The Ag NW-mesh electrode includes a flexible substrate; and a mesh pattern layer which is disposed on the flexible substrate and in which a plurality of first meal lines and a plurality of second metal lines are composed of Ag NWs and intersect each other in an orthogonal or diagonal direction to form a grid pattern, wherein the first metal lines and the second metal lines of the mesh pattern layer form an angle of 35 degrees to 55 degrees with respect to a bending direction.

Electroless metal-defined thin pad first level interconnects for lithographically defined vias

A package substrate, comprising a package comprising a substrate, the substrate comprising a dielectric layer, a via extending to a top surface of the dielectric layer; and a bond pad stack having a central axis and extending laterally from the via over the first layer. The bond pad stack is structurally integral with the via, wherein the bond pad stack comprises a first layer comprising a first metal disposed on the top of the via and extends laterally from the top of the via over the top surface of the dielectric layer adjacent to the via. The first layer is bonded to the top of the via and the dielectric layer, and a second layer is disposed over the first layer. A third layer is disposed over the second layer. The second layer comprises a second metal and the third layer comprises a third metal. The second layer and the third layer are electrically coupled to the via.

Pattern-edged metal-plane resonance-suppression

Apparatuses and methods are provided for mitigating radio frequency interference and electromagnetic compatibility issues caused by the resonance of metal planes of a circuit board. A method for controlling impedance at an edge of a circuit board includes creating a cut at an edge of a plane of the circuit board. The cut extends from the edge of the plane to a point at a depth into the plane. The method can further include creating a cut pattern in the edge of the plane by repeating the cut along the edge of the plane such that an impedance of the plane at the depth is different, or lower, than an impedance of the plane at the edge of the plane. Other aspects are described.

PRINTED CIRCUIT BOARD MESH ROUTING TO REDUCE SOLDER BALL JOINT FAILURE DURING REFLOW

Voids are introduced in a copper shape to reduce warpage experienced by a printed circuit board during a reflow process. Copper shapes on an outer layer of a printed circuit board may be used to connect large packages that include ball grid arrays to the printed circuit board. The copper shapes may induce warpage in the printed circuit board during the reflow process. Routing a mesh pattern of voids in the copper shapes may reduce solder ball joint cracking and pad cratering during reflow and make solder joints more reliable. The voids may make the copper shapes less ridged and change the copper heat dissipation profile to remove sharp warpage forces that cause solder joints to experience pad cratering. The voids may be 8 mil x 8 mil cuts or indentations in the copper shape.

CIRCUIT BOARD
20230254970 · 2023-08-10 · ·

A heat radiating substrate (10) (circuit board) includes: an insulating layer (11) (insulating substrate); and a circuit pattern (20) of a metal provided on the insulating layer (11) in direct contact with the insulating layer (11), in which the circuit pattern (20) has a first circuit pattern formed in a first region on the insulating layer (11) and a second circuit pattern (120) formed in a second region on the insulating layer (11), and the first region (that is, the first circuit pattern) surrounds and closes the second region (that is, second circuit pattern (120)) when viewed in a top view.

CIRCUIT BOARD
20230254970 · 2023-08-10 · ·

A heat radiating substrate (10) (circuit board) includes: an insulating layer (11) (insulating substrate); and a circuit pattern (20) of a metal provided on the insulating layer (11) in direct contact with the insulating layer (11), in which the circuit pattern (20) has a first circuit pattern formed in a first region on the insulating layer (11) and a second circuit pattern (120) formed in a second region on the insulating layer (11), and the first region (that is, the first circuit pattern) surrounds and closes the second region (that is, second circuit pattern (120)) when viewed in a top view.

COMPOSITE COPPER FOIL AND METHOD OF FABRICATING THE SAME

A composite copper foil contains a carrier layer, a release layer and an ultra-thin copper layer in this order. In the composite copper foil, the release layer includes a binary alloy or a ternary alloy comprising nickel, and is formed into an amorphous layer, and the ultra-thin copper layer is peelable from the carrier layer. A method of fabricating the composite copper foil includes preparing a carrier layer, forming a release layer which is amorphous on the carrier layer by electroplating using an electrolyte that comprises nickel, and forming an ultra-thin copper layer on the release layer by electroplating.