H05K3/10

TRACE ANYWHERE INTERCONNECT

The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side

TRACE ANYWHERE INTERCONNECT

The present invention provides for a method and structure for forming three-dimensionally routed dielectric wires between discrete points on the two or more parallel circuit planes. The wires may be freely routed in three-dimensional space as to create the most efficient routing between the two arbitrarily defined points on the two or more parallel circuit planes. Metalizing the outer surfaces of these three dimensional dielectric wires electrically coupling the discrete wires to their respective discrete contact points. Two or more of these wires may be in intimate contact to one another electrically coupling to each other as well as to two or more discrete contact pads. These electrically coupled contact pads may be on opposite sides or on the same side of the structure and the formed metalized wires may originate on one side and terminate on the other or originate and terminate from the same side

STACKED TRANSMISSION LINE

A stacked, multi-layer transmission line is provided. The stacked transmission line includes at least a pair of conductive traces, each conductive trace having a plurality of conductive stubs electrically coupled thereto. The stubs are disposed in one or more separate spatial layers from the conductive traces.

STACKED TRANSMISSION LINE

A stacked, multi-layer transmission line is provided. The stacked transmission line includes at least a pair of conductive traces, each conductive trace having a plurality of conductive stubs electrically coupled thereto. The stubs are disposed in one or more separate spatial layers from the conductive traces.

PRINTED CIRCUIT BOARD, PRINTED CIRCUIT BOARD WITH CARRIER AND METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD PACKAGE

A printed circuit board includes: a plurality of insulating layers; a plurality of wiring pattern layers disposed on at least one surface of the plurality of insulating layers; a via connecting wiring pattern layers, among the plurality of wiring pattern layers, disposed on upper and lower surfaces of one of the plurality of insulating layers to each other; a connection pad disposed on a surface of an outermost layer among the plurality of insulating layers; and a solder resist having a hole exposing at least a portion of the connection pad. An external surface of the solder resist has surface roughness.

PRINTED CIRCUIT BOARD, PRINTED CIRCUIT BOARD WITH CARRIER AND METHOD FOR MANUFACTURING PRINTED CIRCUIT BOARD PACKAGE

A printed circuit board includes: a plurality of insulating layers; a plurality of wiring pattern layers disposed on at least one surface of the plurality of insulating layers; a via connecting wiring pattern layers, among the plurality of wiring pattern layers, disposed on upper and lower surfaces of one of the plurality of insulating layers to each other; a connection pad disposed on a surface of an outermost layer among the plurality of insulating layers; and a solder resist having a hole exposing at least a portion of the connection pad. An external surface of the solder resist has surface roughness.

FLEXIBLE INTERCONNECT

Examples are provided for a flexible circuit element including a flexible insulating support structure, a solid metal trace extending at least partially between a first connector and a second connector on the flexible insulating support structure, and a liquid metal conductor disposed in contact with the solid metal trace in a region of the trace configured to repeatedly flex when installed in a device.

FLEXIBLE INTERCONNECT

Examples are provided for a flexible circuit element including a flexible insulating support structure, a solid metal trace extending at least partially between a first connector and a second connector on the flexible insulating support structure, and a liquid metal conductor disposed in contact with the solid metal trace in a region of the trace configured to repeatedly flex when installed in a device.

WIRING SUBSTRATE, ELECTRONIC DEVICE AND ELECTRONIC MODULE
20230199937 · 2023-06-22 · ·

A wiring substrate includes: an insulating substrate including a base portion comprising a through hole having a first opening and a second opening, and a frame portion located on the base portion; and a heat dissipator disposed on a side of the base portion that is opposite to the frame portion so as to block the second opening, wherein an inner surface of the through hole faces a side surface of the heat dissipator with a clearance being provided between the inner surface of the through hole and the side surface of the heat dissipator.

CIRCUIT FORMING METHOD AND CIRCUIT FORMING DEVICE
20230199970 · 2023-06-22 · ·

A circuit forming method for forming a circuit with a curable resin and a conductive fluid, the method including a setting step of setting errors that occur during a circuit forming work to an automatic release error and a non-release error for each type of error, the automatic release error being to be automatically released, and the non-release error being not to be automatically released, a determination step of determining whether an error has occurred in work when the circuit is formed, and a re-execution step of automatically re-executing work determined that the error has occurred in the determination step, in a case where the error of the work is set to the automatic release error in the setting step.