A stackable via package includes a substrate having an upper surface and a trace on the upper surface, the trace including a terminal. A solder ball is on the terminal. The solder ball has a solder ball diameter A and a solder ball height D. A via aperture is formed in a package body enclosing the solder ball to expose the solder ball. The via aperture includes a via bottom having a via bottom diameter B and a via bottom height C from the upper surface of the substrate, where A<B and 0=<C<1/2×D. The shape of the via aperture prevents solder deformation of the solder column formed from the solder ball as well as prevents solder bridging between adjacent solder columns.

A backplane connector includes a housing and a number of terminal modules. Each terminal module includes a number of conductive terminals, a metal shield surrounding member, a first metal shield and a second metal shield. The conductive terminal includes a mating portion and a tail portion. The conductive terminals include a first signal terminal and a second signal terminal. The metal shield surrounding member surrounds the mating portions of the first signal terminal and the second signal terminal. The first metal shield and the second metal shield are in contact with the metal shield surrounding member. As a result, the shielding area is increased and the shielding effect is improved.

According to an embodiment disclosed in the specification, an electronic device comprises a battery disposed inside the electronic device; a printed circuit board (PCB) disposed inside the electronic device; at least one electronic component disposed on the PCB; and a first buck converter having a first end and a second end, wherein the first end is routed to the battery; and a second buck converter having a first end and a second end, wherein the first end is selectively electrically connected to the second end of the first buck converter, and the second end is routed to the at least one electronic component, and wherein the first buck converter and the second buck converter are configured to boost a voltage provided from the battery through an electrical path formed from the battery by the first end of the first buck converter, and the second end of the first buck converter, the first end of the second buck converter and the second end of the second buck converter to the at least one electronic component.

A subassembly for efficiently and reliably assembling a high performance electronic device. The electronic device may include numerous cabled interconnects in a subassembly that is subsequently mechanically and electrically connected to a PCB populated with high performance electronic components. First ends of cables in the cabled interconnects may be terminated by a first type of connector configured for connection to the PCB via a downward force. The second ends of the cables may be terminated with a second type of connectors that may make connections to other portions of an electronic system incorporating the electronic device. The connectors at the first ends of the cables may be releasably held within an organizer. The connectors may be simply mounted to the PCB by positioning the organizer with respect to the PCB, releasing the connectors from the organizer, and pushing the connectors into engagement with mounting locations on the PCB.

An electronic component module includes a plurality of components having terminals and arranged along a plane, a sealing resin portion that covers and seals these components and has a plane as one plane of an outer surface, and a shield layer that covers the outer surface of the sealing resin portion. Terminals of the plurality of components are exposed in a state of protruding from the plane of the sealing resin portion, and the terminals of these components protruding from the plane of the sealing resin portion are used as mounting terminals of the electronic component module.

Provided are a light board, a method for manufacturing the same, a light-emitting diode (LED) backlight module and an LED backlight device. The light board includes a substrate and a LED device. The substrate includes a first surface and a second surface disposed opposite to each other. The first surface and the second surface are each provided with a wiring area and a non-wiring area. A first heat sink assembly and multiple first reinforcement ribs are disposed in the non-wiring area of the first surface. The multiple first reinforcement ribs intersect to form a first encircled area. The first heat sink assembly is disposed in the first encircled area. The LED device is disposed in the wiring area of the second surface.

A device source wafer includes a wafer substrate, devices formed on or in the wafer substrate at a location on the wafer substrate, and test structures disposed on the wafer substrate connected to some but not all of the devices. The devices include a first device disposed at a first location and a second device disposed at a second different location on the wafer substrate. The test structures include at least a first test structure connected to the first device and a second test structure connected to the second device. The first test structure is adapted to measuring a characteristic of the first device and the second test structure is adapted to measuring the characteristic of the second device. An estimated characteristic of unmeasured devices is derived from the first and second device locations and measured characteristics and the device is selected based on the estimated characteristic.

One feature pertains to a modular design of a motherboard for a computer system. The mother board is disaggregated into a CPU board and an IO board. The CPU board contains at least one CPU, the associated memory subsystem and the voltage regulator module. The integrated IO ports escape to a high speed connector mating with its counterpart on an IO board which contains all peripheral devices including system logic not part of the CPU. In a multi-socket configuration the CPUs are on the CPU board and the processor interconnects are routed directly in a point to point manner.

Provided is an image processing method for easily viewing images obtained by imaging multiple components at a time, the method including image capturing processing of capturing each component holding state relating to multiple suction nozzles mounted on a mounting head as one image, image dividing processing of dividing a region relating to a predetermined component holding state for image data of the multiple component holding states obtained by the image capturing processing, direction conversion processing of converting a direction of the component holding state for divided image data divided by the image dividing processing, and display processing of displaying an image based on the divided image data subjected to the direction conversion processing.

A PCB bridge for interconnection of two or more semiconductor chips for data communication between the semiconductor chips includes a plurality of metal strips; and a dielectric material disposed in between the plurality of metal strips. The PCB bridge is employed in a vertical direction in a semiconductor module for interconnection of two or more semiconductor chips, the vertical direction of the PCB bridge provides a flexible impedance matching by adjusting the dielectric material and a trace width of the PCB bridge, and the vertical direction of the PCB bridge avoids signal reflections by matching the impedance to a source, and a trace length of the PCB bridge is limited by spacing in between two semiconductor chips which further limited inductance of the trace of the PCB bridge.