A fluororesin composition is provided. The fluororesin composition comprises the following constituents: (A) a first fluororesin, which is polytetrafluoroethylene (PTFE) resin; (B) a first filler, which is a flat glass fiber; and (C) particles of a second fluororesin, which are coated with polysiloxane,
wherein, the particle size of the polysiloxane-coated particles of second fluororesin ranges from 0.2 μm to 80 μm, and the melting point of the second fluororesin is lower than the melting point of the first fluororesin.

A power module substrate includes an insulating substrate and a metal plate. The metal plate is joined to the insulating substrate with a brazing material in between. As to surface roughness of a lateral surface of the metal plate in a thickness direction, the surface roughness of at least a corner part farthest from a center of the metal plate in plan view is larger than the surface roughness of plane parts sandwiching the corner part.

A substrate for a printed circuit board according to an embodiment of the present invention includes a base film and a metal layer disposed on at least one of surfaces of the base film. In the substrate for a printed circuit board, an amount of nitrogen present per unit area, the amount being determined on the basis of a peak area of a N1s spectrum in XPS analysis of a surface of the base film exposed after removal of the metal layer by etching with an acidic solution, is 1 atomic % or more and 10 atomic % or less.

A fluororesin base material containing a fluororesin as a main component includes a modified layer on at least a partial region of a surface thereof, the modified layer containing a siloxane bond and a hydrophilic organofunctional group, and a surface of the modified layer having a contact angle of 90° or less with pure water.

A circuit substrate comprising, in the following stacked order, a resin base material 1 having a dielectric loss tangent of 0.015 or lower, a polyaniline layer 2 comprising a substituted or unsubstituted polyaniline, and a metal layer 3, wherein the metal layer 3 has a surface roughness Rz.sub.JIS of 0.5 μm or less at the surface on the side of the polyaniline layer 2.

A wiring substrate includes an insulating substrate, a conductor and an Ni film. The insulating substrate has a first surface and a second surface on a side opposite the first surface, and contains AlN. The conductor is disposed on the first surface and contains Cu. The Ni film is disposed so as to extend across an upper surface and a side surface of the conductor to the first surface. Ti oxide is scattered so as to be at a plurality of points on the first surface.

A wiring substrate includes an insulating substrate, a conductor and an Ni film. The insulating substrate has a first surface and a second surface on a side opposite the first surface, and contains AlN. The conductor is disposed on the first surface and contains Cu. The Ni film is disposed so as to extend across an upper surface and a side surface of the conductor to the first surface. Ti oxide is scattered so as to be at a plurality of points on the first surface.

An electroless plating undercoat film comprising (A) a conductive polymer and further comprising (B) a reactant of a polyol resin having an acid value and a polyisocyanate compound, wherein the acid value is 0.1 mgKOH/g to 30 mgKOH/g.

Provided are an electrodeposited copper foil, an electrode comprising the same, and a lithium-ion secondary battery comprising the same. The electrodeposited copper foil has a drum side and a deposited side opposing the drum side, wherein at least one of the drum side and the deposited side exhibits a void volume value (Vv) in the range of 0.17 μm.sup.3/μm.sup.2 to 1.17 μm.sup.3/μm.sup.2; and an absolute value of a difference between a maximum height (Sz) of the drum side and a Sz of the deposited side is in the range of less than 0.60 μm.

Disclosed herein is an electronic component that includes a first conductive layer including a lower electrode and a first inductor pattern, a dielectric film that covers the lower electrode, an upper electrode laminated on the lower electrode through the dielectric film, an insulating layer that covers the first conductive layer, dielectric film, and upper electrode, and a second conductive layer formed on the insulating layer and including a second inductor pattern. The first and second inductor patterns are connected in parallel through via conductors penetrating the insulating layer.