A multilayer substrate includes a stacked body including a first main surface, and a conductor pattern (including a mounting electrode provided on the first main surface, and a first auxiliary pattern provided on the first main surface). The stacked body includes a plurality of insulating base material layers made of a resin as a main material and stacked on one another. The first auxiliary pattern is located adjacent to or in a vicinity of the mounting electrode. The mounting electrode, in a plan view of the first main surface (when viewed in the Z-axis direction), is interposed between a different conductor pattern (the mounting electrode) and the first auxiliary pattern.

Forming, in a printed-wiring board, a via sufficiently filled without residual smear, for use in an insulating layer and the size of the via to be formed. A via of a printed-wiring board comprises a first filling portion which fills at least a center portion of a hole, and a second filling portion which fills a region of the hole that is not filled with the first filling portion. An interface which exists between the second and first filling portions, or an interface which exists between the second filling portion and an insulating layer and the first filling portion has the shape of a truncated cone comprising a tapered surface which is inclined to become thinner from a first surface toward a second surface, and an upper base surface which is positioned in parallel to the second surface and closer to the first surface than to the second surface.

A method includes providing a first laminate and a second laminate. The first laminate includes a first conductor layer, a first insulating layer containing polyimide, and a second conductor layer. The second laminate includes a second insulating layer containing polyimide and a third conductor layer. The method further includes: heating each of the first laminate and the second laminate under a condition including a heating temperature equal to or higher than 100° C. and a heating duration equal to or longer than half an hour; and stacking, after heating, the first laminate and the second laminate one on top of the other with a third insulating layer interposed between the second conductor layer and the second insulating layer.

A high frequency filter includes: a multilayer substrate including a first substrate for which lands are provided, a second substrate for which lands are provided, and a third substrate for which lands are provided, the third substrate being sandwiched between the first substrate and the second substrate; a columnar conductor electrically connected to the lands in the multilayer substrate; and columnar conductors provided to surround the columnar conductor, electrically connected to a ground plane of the first substrate, and electrically connected to a ground plane of the second substrate. The spacing between the lands of the first substrate and the lands of the third substrate and the spacing between the lands of the second substrate and the lands of the third substrate are electrical lengths of 90 degrees or less at the cutoff frequency.

A high frequency filter includes: a multilayer substrate including a first substrate for which lands are provided, a second substrate for which lands are provided, and a third substrate for which lands are provided, the third substrate being sandwiched between the first substrate and the second substrate; a columnar conductor electrically connected to the lands in the multilayer substrate; and columnar conductors provided to surround the columnar conductor, electrically connected to a ground plane of the first substrate, and electrically connected to a ground plane of the second substrate. The spacing between the lands of the first substrate and the lands of the third substrate and the spacing between the lands of the second substrate and the lands of the third substrate are electrical lengths of 90 degrees or less at the cutoff frequency.

An object here is to provide a control device which can be reduced in size, weight and cost while being able to prevent unauthorized access. The control device includes: a microcontroller having a storage device, a processor, a package in which the storage device and the processor are accommodated, and multiple communication electrodes provided on a bottom surface of the package; and a wiring board having wiring layers comprised of a front surface layer, an intermediate layer and a rear surface layer, each having a wiring pattern formed therein, insulating members for insulating the respective wiring layers from each other; interlayer connection portions each making an electrical connection between the wiring patterns in different ones of the wiring layers; multiple electrode pads formed n the front surface layer; and communication-dedicated interlayer connection portions which are electrically connected to the respective electrode pads, and which are each externally exposed.

A circuit board includes a substrate, a build-up circuit structure, a graphene oxide layer, a graphene layer, and an insulating material layer. The build-up circuit structure is disposed on the substrate, including at least one inner circuit, at least one dielectric layer, an outer circuit, and multiple conductive vias. The dielectric layer is disposed on the inner circuit. The outer circuit is disposed on the dielectric layer. The conductive vias penetrate the dielectric layer and electrically connect the inner circuit and the outer circuit. The graphene oxide layer and the graphene layer are disposed on the build-up circuit structure at an interval. The graphene oxide layer and the graphene layer are respectively disposed in correspondence to the dielectric layer and the outer circuit. The insulating material layer is disposed on the graphene oxide layer and the graphene layer. The insulating material layer has an opening, which exposes the graphene layer.

An electronic device and a method for manufacturing such an electronic device are described. The electronic device includes an electronic component, and a component carrier in which the electronic component is embedded. The component carrier includes a first component carrier part having a first cut-out portion and a second component carrier part having a second cut-out portion, the first cut-out portion and the second cut-out portion facing opposite main surfaces of the electronic component. An electrically conductive material is provided on the surface of the first cut-out portion and on the surface of the second cut-out portion. The first cut-out portion and the second cut-out portion respectively form a first cavity and a second cavity on opposite sides of the electronic component.

There is provided a method of manufacturing a multilayer wiring board including: alternately stacking wiring layers and insulating layers; stacking a reinforcing sheet having openings on one surface of the resulting multilayer laminate with a soluble adhesive layer therebetween; contacting or infiltrating the soluble adhesive layer with a liquid capable of dissolving the soluble adhesive layer through the openings to thereby dissolve or soften the soluble adhesive layer; and releasing the reinforcing sheet from the multilayer laminate at the position of the soluble adhesive layer. This method enables the multilayer wiring layer to be reinforced so as to generate no large local warpage, thereby improving the reliable connection in the multilayer wiring layer and the flatness (coplanarity) on the surface of the multilayer wiring layer. The reinforcing sheet having finished its role can be released in a significantly short time, while minimizing the stress applied to the multilayer laminate.

There is a method of manufacturing a multilayer wiring board including: alternately stacking wiring layers and insulating layers; stacking a reinforcing sheet on one surface of the resulting multilayer laminate with a soluble adhesive layer therebetween, wherein an unoccupied region without the soluble adhesive layer is provided within a facing area where the reinforcing sheet faces the multilayer laminate; allowing a liquid capable of dissolving the soluble adhesive layer to infiltrate the unoccupied region to dissolve or soften the soluble adhesive layer; and releasing the reinforcing sheet from the multilayer laminate at the soluble adhesive layer. This method enables the multilayer wiring layer to be reinforced to generate no large local warpage, thereby improving the reliable connection and the surface flatness (coplanarity) of the multilayer wiring layer. The used reinforcing sheet can be released in a significantly short time, while minimizing the stress applied to the multilayer laminate.