A method of manufacturing a multilayer board includes forming conductor patterns on four or more insulating base material layers, forming a multilayer body by stacking the insulating base material layers in a state in which the conductor patterns face each other with prepreg layers therebetween, and heat-pressing the multilayer body. In a state before the step of heat-pressing, among the prepreg layers, a thickness of an outermost prepreg layer is larger than a thickness of a prepreg layer other than the outermost prepreg layer.

The invention pertains to a method for the bonding of a component embedded into a printed circuit board exhibiting the following steps: Provision of a core exhibiting at least one insulating layer and at least one conductor layer applied to the insulating layer, Embedding of at least one component into a recess of the insulating layer, wherein the contacts of the component are essentially situated in the plane of an outer surface of the core exhibiting the at least one conductor layer, Application of a photoimageable resist onto the one outer surface of the core on which the component is arranged, while filling the spaces between the contacts of the component, Clearing of end faces of the contacts and of the areas of the conductor layer covered by the photoimageable resist by exposing and developing the photoimageable resist, by application of a semi-additive process, deposition of a layer of conductor material onto the cleared end faces of the contacts and the cleared areas of the conductor layer and formation of a conductor pattern on at least the one outer surface of the core on which the component is arranged, as well as the interconnecting paths between the contacts and the conductor pattern, and Removal of the areas of the conductor layer not belonging to the conductor pattern.

According to an aspect of the present disclosures, a method of making a flexible printed circuit board, which includes a base film having an insulating property, a conductive pattern disposed on either one or both surfaces of the base film, and a cover layer covering a conductive-pattern side of a laminated structure inclusive of the base film and the conductive pattern, includes a superimposing step of superimposing a cover film on the conductive-pattern side of the laminated structure, the cover film having a first resin layer and a second resin layer that is laminated to an inner side of the first resin layer and that softens at a lower temperature than does the first resin layer, and a pressure bonding step of vacuum bagging the laminated structure and the cover film at a temperature higher than a softening temperature of the second resin layer.

A fabrication process for soft-matter printed circuit boards is disclosed in which traces of liquid-phase Ga—In eutectic (eGaIn) are patterned with UV laser micromachining (UVLM). The terminals of the elastomer-sealed LM circuit connect to the surface mounted chips through vertically-aligned columns of eGaIn-coated ferromagnetic microspheres that are embedded within an interfacial elastomer layer.

A method of manufacturing a semiconductor device, includes: preparing a support substrate having a peeling layer formed on a main surface side; partially forming a wiring layer above the peeling layer; arranging a semiconductor chip on the support substrate so that a pad of the semiconductor chip is electrically connected to the wiring layer; forming an encapsulating layer that encapsulates at least a part of the wiring layer and the semiconductor chip and is in contact with the peeling layer or a layer above the peeling layer so as to form an intermediate laminated body including the semiconductor chip, the wiring layer, and the encapsulating layer on the support substrate; cutting a peripheral portion of the support substrate after forming the intermediate laminated body; and mechanically peeling the intermediate laminated body from the support substrate with the peripheral portion cut away, with the peeling layer being as a boundary.

A component carrier includes a stack having at least one electrically conductive layer structure and/or at least one electrically insulating layer structure. A component is embedded in the stack. A first thermally conductive block is located above and thermally connected with the component, and a second thermally conductive block is located below and thermally coupled with the component. Heat generated by the component during operation is removed via at least one of the first thermally conductive block and the second thermally conductive block.

A multilayer PCB structure includes a core layer, a first layer on a first surface of the core layer, a second layer on a second surface of the core layer, and a thermally conductive material in the core layer. The first surface and the second surface of the core layer are opposite to each other, and a window is formed on the second layer by removing part of the second layer. The window of the second layer exposes part of the core layer below the thermally conductive material.

A wiring circuit board includes a base insulating layer; a first wiring disposed on the base insulating layer; an intermediate insulating layer disposed on the base insulating layer so as to cover the first wiring; a second wiring disposed on the intermediate insulating layer; a single layer first terminal, disposed on the base insulating layer, and electrically connected to the first wiring; and a single layer second terminal, disposed on the base insulating layer, and electrically connected to the second wiring. The first terminal is continuous with the first wiring. The second terminal is discontinuous from the second wiring. The wiring circuit board further includes a connecting portion disposed on the base insulating layer and continuous with the second terminal to electrically connect to the second wiring.

A component carrier assembly includes a first component carrier having a first electrically insulating layer structure and a via in the first electrically insulating layer structure, where the via is at least partially filled with electrically conductive material and where an upper part of the via extends beyond an outer main surface of the first component carrier; and a second component carrier having a second electrically insulating layer structure, and an electrically conductive adhesive material that is at least partially embedded in the second electrically insulating layer structure. The first component carrier and the second component carrier are interconnected and the upper part of the via at least partially penetrates into the electrically conductive adhesive material.

A multilayer circuit board including a ceramic substrate part and a unit circuit board coupled to one surface of the ceramic substrate part. The unit circuit board includes an insulating layer with a circuit pattern formed on one side, an adhesive layer adhered to another surface of the insulating layer, a via hole passing through the insulating layer and the adhesive layer and connected to one surface of the circuit pattern, and conductive paste filled in the via hole.

A manufacturing method including batch bonding a circuit board part, which includes a plurality of unit circuit boards, and a ceramic substrate part, wherein each unit circuit board includes providing an insulating layer having a circuit layer, forming an adhesive layer on the insulating layer, forming a circuit pattern, forming a via hole in the insulating and adhesive layers, and filling the via hole with conductive paste.