H05K3/46

CIRCUIT BOARD STRUCTURE WITH WAVEGUIDE AND METHOD FOR MANUFACTURING THE SAME
20230029270 · 2023-01-26 ·

A method for manufacturing a circuit board structure with a waveguide is provided. The method includes: providing a first substrate unit, a second substrate unit, a third substrate unit, and two adhesive layers, the first substrate unit including a first dielectric layer and a first conductive layer, the first conductive layer including a first shielding area and two first artificial magnetic conductor areas disposed on two sides of the first shielding area; the second substrate unit including a second dielectric layer and a second conductive layer, the second conductive layer including a second shielding area; the third substrate unit defining a first slot, and the adhesive layer defining a second slot; stacking the first substrate unit, one of the adhesive layers, the third substrate unit, another one of the adhesive layers, and the second substrate unit in that order; pressing the intermediate body.

BACK PLATES TO SUPPORT INTEGRATED CIRCUIT PACKAGES IN SOCKETS ON PRINTED CIRCUIT BOARDS AND ASSOCIATED METHODS
20230022058 · 2023-01-26 ·

Back plates to support integrated circuit packages in sockets on printed circuit boards and associated methods are disclosed. An example back plate includes a ceramic substrate having a first surface and a second surface opposite the first surface. The example back plate further includes metal coupled to the ceramic substrate. At least a portion of the metal is disposed between planes defined by the first and second surfaces of the ceramic substrate.

TRANSMISSION BOARD TO CARRY ELECTROMAGNETIC WAVE WITHOUT LEAKAGE AND METHOD FOR MANUFACTURING SAME
20230025696 · 2023-01-26 ·

An electromagnetic wave transmission board proofed against internal signal leakage includes an inner plate, a first outer plate, a second outer plate, a first plate bump, a first conductive bump, a second plate bump, and a second conductive bump. The inner plate defines a first through hole with a plated metal layer on the hole wall. The first and second plated bumps are disposed between the first outer and inner plates. The second plate bump and the second conductive bump are disposed between the second outer plate and the inner plate. The plate metal layer, the first plate bump, the first conductive bump, the first outer plate, the second outer plate, the second conductive bump, and the second plated bump jointly form an air-filled chamber. A method for manufacturing the electromagnetic wave transmission board is also provided.

SUBSTRATE FOR PRINTED WIRING BOARD AND MULTILAYER SUBSTRATE

A substrate for a printed wiring board includes a base layer, and a copper foil directly or indirectly stacked on at least a part of one or both surfaces of the base layer. The base layer includes a matrix containing a fluororesin as a main component and one or more reinforcing material layers included in the matrix, and a ratio B/A is 0.003 to 0.37, where A is an average thickness of the base layer, and B is an average distance between a surface of the copper foil facing the matrix and a surface of a reinforcing material layer closest to the surface of the copper foil facing the copper foil.

ANTENNA PACKAGE AND IMAGE DISPLAY DEVICE INCLUDING THE SAME

An antenna package includes a first antenna device including a first antenna unit, a second antenna device disposed at a level different from that of the first antenna device, the second antenna device including a second antenna unit that has a radiation direction different from that of the first antenna unit, a first circuit board electrically connected to the first antenna unit, a second circuit board electrically connected to the second antenna unit, and a third circuit board electrically and independently connected to the first circuit board and the second circuit board, the third circuit board having at least one antenna driving integrated circuit (IC) chip mounted thereon.

METHOD FOR MANUFACTURING A PACKAGING SUBSTRATE, AND PACKAGING SUBSTRATE
20230232545 · 2023-07-20 ·

A method for manufacturing a packaging substrate, and a packaging substrate are disclosed. The method includes: providing a bottom board with a first circuit layer, the first circuit layer being provided with at least one demand point, and one side of the demand point being provided with a first to-be-avoided region; machining a first intermediate insulating layer on the bottom board, the first intermediate insulating layer including a first intermediate insulating dielectric covering the first to-be-avoided region; machining a first intermediate wiring layer on the first intermediate insulating layer, the first intermediate wiring layer including a first intermediate circuit partially arranged on the first intermediate insulating dielectric and connected to the demand point; machining a first insulating layer on the first intermediate wiring layer which is stacked on the bottom board and covers the first intermediate wiring layer; and machining a circuit build-up layer on the first insulating layer.

Vibration-damped circuit arrangement, converter, and aircraft having such an arrangement

The invention relates to a circuit arrangement, comprising at least one wiring carrier plate (1), characterized by at least one separating element (2) formed in the wiring carrier plate (1), which separating element divides the wiring carrier plate (1) into sections separated by the separating element (2), wherein the transfer of vibrations from one section to another section is at least partially decoupled and/or damped by the separating element (2). The invention further relates to a converter having such a circuit arrangement, and to an aircraft having a converter. The converter can comprise capacitor stacks (3) arranged on the wiring carrier plate (1), and power semiconductors (6).

PACKAGING PROCESS FOR EMBEDDED CHIPS
20230230929 · 2023-07-20 ·

A packaging process for embedded chips includes: (1) mounting at least one IC chip on a circuit substrate, the IC chip having at least one exposed pin; (2) attaching a self-adhesive copper foil film to the surface of the circuit substrate, wherein the self-adhesive copper foil film has a copper foil layer and a B-stage insulating adhesive layer, the copper foil layer has at least one to-be-opened copper foil area corresponding to the pin, the insulating adhesive layer is applied on the copper foil layer, has no glass fiber, covers the IC chip, and has at least one to-be-opened insulating adhesive area corresponding to the pin, and the pin is in contact with the insulating adhesive layer but not with the copper foil layer; (3) removing the to-be-opened copper foil area; (4) removing the to-be-opened insulating adhesive area with an etching solution; and (5) curing the insulating adhesive layer completely.

Method of manufacturing curved-surface metal line
11564319 · 2023-01-24 · ·

A method of manufacturing a curved-surface metal line is provided. A three-dimensional structure is formed with a metal member and then fixed together with an insulator. Alternatively, the metal member and the insulator are embedded-formed to jointly form the three-dimensional structure, or the metal member and the insulator are fixed together and then jointly form the three-dimensional structure. Then, a photoresist protection layer is formed outside the metal member, and a selective exposure treatment is performed such that corresponding locations of the photoresist protection layer being exposed is subject to a photochemical reaction. The photoresist protection layer is developed, and after the photoresist protection layer is partially dissolved, portions of the metal member at the corresponding locations are simultaneously exposed. The exposed portions of the metal member are etched, and residual portions of the photoresist protection layer are removed to form the metal line provided on the insulator.

SEMICONDUCTOR PACKAGE

A semiconductor package according to an embodiment includes a first insulating layer including a through hole; an insulating member disposed in the through hole of the first insulating layer; a first electrode layer disposed on the insulating member; a second insulating layer disposed on the first electrode layer; and a first through electrode passing through the second insulating layer, wherein the first through electrode overlaps the first electrode layer and the insulating member in a vertical direction.