The present disclosure provides a complex protection device including: a laminate in which a plurality of sheets are laminated; a plurality of internal electrodes formed inside the laminate; an overvoltage protection part formed on at least a portion of the sheets; and an external electrode provided outside the laminate and connected to the internal electrode and the overvoltage protection part, wherein at least a portion of the plurality of sheets has a dielectric constant different from the other sheets.

Various embodiments of the disclosure relate to, e.g., a case of a wearable electronic device wearable on a human body portion. According to certain embodiments of the disclosure, there may be provided an electronic device case for storing a wearable electronic device comprising a case housing forming a space for receiving the wearable electronic device, a conductive supporting member disposed in the case housing, and a contact member disposed in the space for receiving the wearable electronic device and exposed to an exterior when the case housing is opened, electrically connected with the conductive supporting member, and configured to at least partially contact a conductive portion of the wearable electronic device. Other various embodiments are also possible.

Systems and methods are provided for cover plates for printheads. One embodiment is an apparatus that includes a cover plate for a printhead. The cover plate includes multiple layers of electrically conductive material, a layer of nonconductive ferrite that is sandwiched between the multiple layers, and at least one connector that penetrates through the multiple layers and the layer of nonconductive ferrite to form a conductive pathway for electric current between the multiple layers through the layer of nonconductive ferrite. The cover plate also includes at least one opening that penetrates through the multiple layers and the layer of nonconductive ferrite, and that is configured to align with nozzles of the printhead.

Embodiments of negative pressure wound therapy systems and methods are disclosed. In one embodiment, an apparatus includes a housing, negative pressure source, circuit board, and one or more controllers. The circuit board can be supported by the housing and include a conductive pathway extending around at least part of a perimeter of a first side of the circuit board. The conductive pathway can be electrically coupled to an electrical ground for the circuit board. The one or more controllers can be mounted on the circuit board and activate and deactivate the negative pressure source.

A transceiver capable of common mode operating range and output voltage tolerance set by an isolation boundary and not limited by the device type used in the circuitry. The subject technology is a powered isolated transceiver, where the isolated generated supply and ground nodes are concealed and thus do not participate in tests that stress electrostatic discharge (ESD)/electrical overstress (EOS) or voltage tolerance. The architecture of the subject technology has the advantage of extremely high common mode performance and robust performance using low voltage devices and simplified architecture, which in turn provides less capacitive loading, faster operation, less expensive die development, electromagnetic interference (EMI) advantages, and simple active termination. The subject technology includes an isolation architecture that can be used in environments where isolation is used but is also advantageous in systems without the need for isolation.

Embodiments of an electrostatic discharge (ESD) protection device and a method of operating an ESD protection device are described. In one embodiment, an ESD protection device includes a bipolar transistor device connected between a first node and a second node, a series protection device connected in series with the bipolar transistor device, and a diode device connected between the second node and a third node. A drain terminal of an NMOS device to be protected is connectable to the first node. A body of the NMOS device to be protected is connectable to the second node. A source terminal of the NMOS device to be protected is connectable to the third node. The diode device and the bipolar transistor device are configured to form a parasitic silicon controlled rectifier. Other embodiments are also described.

A method of protecting devices within an integrated circuit during electro-static discharge (ESD) testing using an ESD test system is provided. The method includes applying a direct current (DC) bias voltage to an input of at least one device of the integrated circuit and applying an ESD simulated signal to at least one other input of the integrated circuit. The applied ESD simulated signal is conducted along a first current path to a first ground, while a low-current signal associated with the at least one device is conducted along a second current path to the second ground. The DC bias voltage is maintained between the input of the at least one device and the second ground at a substantially constant value in response to a signal variation on the second ground that results from the applied ESD simulated signal.

A fourth layer outer frame protection pattern of a multilayer circuit board housed in a conductive base and a nonconductive cover is in contact with an inner surface of the base via a selection layer, and is connected to a second layer planar ground pattern via a coupling capacitor, outer peripheral portions of respective layer patterns including a first and third layer annular ground patterns are overlapped with each other, and the planar ground pattern is wire connected to a reference ground point of a vehicle body. When the base is conductively attached to the vehicle body, a selection layer is a solder resist film, and when it is non-conductively attached, the selection layer is a solder film, so that the planar ground pattern does not conduct with the base at the time of short circuit abnormality of the coupling capacitor.

A circuit board with an electrostatic discharge protection mechanism and an electronic apparatus having the same are provided. The circuit board includes a substrate, at least one signal trace, and a conductive element. The at least one signal trace is disposed on the substrate. The conductive element is electrically connected to a ground plane of the substrate and crosses over the at least one signal trace. The conductive element has at least one discharging portion. The position of the at least one discharging portion corresponds to the at least one signal trace. A gap exists between the at least one discharging portion and the at least one signal trace. A static electricity of the at least one signal trace is discharged to the at least one discharging portion.

A power converter includes an outer housing formed of dielectric material and including a low voltage compartment and a high voltage compartment is disclosed. The power converter also includes a low voltage DC-to-AC converter disposed in the low voltage compartment, a first coil in the low voltage compartment, a first conductive shield element lining an outer wall of the low voltage compartment, the first conductive shield element being electrically coupled to an electrical input of the DC-to-AC converter and a second conductive shield element lining an outer wall of the high voltage compartment.