Patent classifications
H05K2203/04
METHOD FOR FORMING SOLDER BUMPS USING SACRIFICIAL LAYER
A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.
METHOD FOR FORMING SOLDER BUMPS USING SACRIFICIAL LAYER
A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.
Electronic component, electric device including the same, and bonding method thereof
Provided is an electronic component including a pad region including a plurality of pads extending along corresponding extension lines and arranged in a first direction, and a signal wire configured to receive a driving signal from the pad region, wherein the plurality of pads include a plurality of first pads arranged continuously and a plurality of second pads arranged continuously, and extension lines of the plurality of first pads substantially converge into a first point and extension lines of the plurality of second pads substantially converge into a second point different from the first point.
Solder pads, methods, and systems for circuitry components
Solder pads, systems, and related methods are provided. A first or second pad include at least one shape for increasing a number of edges available to align at least one part to be soldered thereto. Each solder pad can occupy a same surface area of the substrate. A plurality of circuit elements can be provided over the plurality of solder pads, where some of the circuit elements occupy different surface areas of the substrate and/or the solder pad. A method of providing a solder pad includes providing a substrate, providing a solder pad over the substrate, and providing at least one shape in the solder pad for increasing a number of edges available to align at least one part to be soldered thereto. The pads can attach for example to a surface-mount ceramic component, a submount-free component, a leadframe component and/or a chip on board component.
Method for forming solder bumps using sacrificial layer
A barrier layer is formed over electrically conductive contact pads on a substrate such as a wafer. A photoresist layer is applied over the barrier layer, and openings in the photoresist layer are filled with solder to form solder bumps. The barrier layer may be removed from within the openings prior to filling the openings with solder. The process is applicable to fine pitch architectures and chip size packaging substrates. The photoresist layer and portions of the barrier layer outside of the openings are removed following solder fill.
Semiconductor device including semiconductor chip having elongated bumps
A semiconductor chip is mounted on a mounting substrate. The semiconductor chip includes plural first bumps on a surface facing the mounting substrate. The plural first bumps each have a shape elongated in a first direction in plan view and are arranged in a second direction perpendicular to the first direction. The mounting substrate includes, on a surface on which the semiconductor chip is mounted, at least one first land connected to the plural first bumps. At least two first bumps of the plural first bumps are connected to each first land. The difference between the dimension of the first land in the second direction and the distance between the outer edges of two first bumps at respective ends of the arranged first bumps connected to the first land is 20 m or less.
Automatic power disconnect method
Coupling an electrical connector to a printed circuit board (PCB) involves disposing forms of conductive bonding agent on the PCB, pressing spring-loaded power pins of an electrical connector towards a surface of the PCB, heating the forms of conductive bonding agent, thereby at least partially melting the forms, pressing the spring-loaded power pins into the melted forms of conductive bonding agent, and holding the power pins in the forms until the forms have cooled enough to form a bond that holds the power pins, thereby forming an electrical connection between the one or more pins and the PCB. The spring-loaded power pins are configured to automatically lift away from the surface of the PCB when the bond is weakened.
Positioning device
A positioning device is adapted for positioning a tool at a setpoint position on a flat substrate in an X-Y plane, the tool exerting a process force in its axial direction perpendicularly onto the substrate. The tool includes a multicomponent force sensor to measure unwanted process-force components in the lateral direction. The setpoint position of the tool is correctable by the positioning device such that the lateral process-force components are minimized.
Bonded body, ceramic copper circuit board, method for manufacturing bonded body, and method for manufacturing ceramic copper circuit board
A bonded body includes a ceramic substrate and a copper plate, in which the copper plate is bonded to the ceramic substrate via a bonding layer, the copper plate includes a surface perpendicular to a direction in which the ceramic substrate and the copper plate are bonded, and a number percentage of copper crystal grains having major diameters greater than 400 m in three 5 mm5 mm regions included in the surface is not less than 0% and not more than 5%. The bonding temperature is favorably not more than 800 C. The number percentage of the copper crystal grains having major diameters greater than 400 m is favorably not more than 1%.
LASER WELDING APPARATUS AND WELDING METHOD USING THE SAME
Discussed is a laser welding apparatus including a lower jig, a laser welding unit configured to weld a metal and another metal to each other, the metal being disposed at an upper surface of a printed circuit board (PCB) disposed on the lower jig, and an upper jig configured to support at least one of at least a part of the upper surface of the PCB, at least a part of an upper surface of the metal, and at least a part of an upper surface of the another metal, wherein: the upper jig is fixed such that the vertical position of the upper jig is constant, or when the upper jig is movable upwards and downwards, the upper jig is configured to be fixed at a specific position.