A method for manufacturing a cured product pattern of a curable composition includes the steps of, in sequence, depositing a droplet of the curable composition onto a substrate; bringing a mold having an uneven pattern formed in a surface thereof into contact with the curable composition; curing the curable composition; and releasing a cured product of the curable composition from the mold. The mold has a recess having a bottom surface and a stair structure arranged to form an opening surface that becomes wider from the bottom surface toward the surface of the mold. In the contact step, the curable composition comes into contact with the stair portion after a top of the droplet comes into contact with the bottom surface.

A method for forming a memory device includes providing an initial semiconductor structure, including a base substrate; a first sacrificial layer formed on the base substrate; a stack structure, disposed on the first sacrificial layer; a plurality of channels, formed through the stack structure and the first sacrificial layer; and a gate-line trench, formed through the stack structure and exposing the first sacrificial layer. The method also includes forming at least one protective layer on the sidewalls of the gate-line trench; removing the first sacrificial layer to expose a portion of each of the plurality of channels and the surfaces of the base substrate, using the at least one protective layer as an etch mask; and forming an epitaxial layer on the exposed surfaces of the base substrate and the plurality of channels.

A semiconductor device includes a first connection pattern; a bit line disposed over the first connection pattern in a vertical direction; and a bit-line contact pad, disposed in a first layer between the bit line and the first connection pattern to electrically couple the bit line to the first connection pattern, and formed as an island when viewed along the vertical direction. A predetermined number of the bit-line contact pads are spaced apart from each other by a predetermined distance in a first direction, when viewed along the vertical direction.

A semiconductor device includes a first connection pattern; a bit line disposed over the first connection pattern in a vertical direction; and a bit-line contact pad, disposed in a first layer between the bit line and the first connection pattern to electrically couple the bit line to the first connection pattern, and formed as an island when viewed along the vertical direction. A predetermined number of the bit-line contact pads are spaced apart from each other by a predetermined distance in a first direction, when viewed along the vertical direction.

A semiconductor device including a substrate that includes a cell array region and a peripheral circuit region; a cell transistor on the cell array region of the substrate; a peripheral transistor on the peripheral circuit region of the substrate; a first interconnection layer connected to the cell transistor; a second interconnection layer connected to the peripheral transistor; an interlayer dielectric layer covering the first interconnection layer; and a blocking layer spaced apart from the first interconnection layer, the blocking layer covering a top surface and a sidewall of the second interconnection layer.

An annealing system is provided that includes a chamber body that defines a chamber, a support to hold a workpiece and a robot to insert the workpiece into the chamber. The annealing system also includes a first gas supply to provide a hydrogen gas, a pressure source coupled to the chamber to raise a pressure in the chamber to at least 5 atmospheres, and a controller configured to cause the robot to transport a workpiece having a metal film thereon into the chamber, where the metal film contains fluorine on a surface or embedded within the metal film, to cause the first gas supply to supply the hydrogen gas to the chamber and form atomic hydrogen therein, and to cause the pressure source to raise a pressure in the chamber to at least 5 atmospheres while the workpiece is held on the support in the chamber.

A microelectronic device comprises local digit line structures, global digit line structures, source line structures, sense transistors, read transistors, and write transistors. The local digit line structures are coupled to strings of memory cells. The global digit line structures overlie the local digit line structures. The source line structures are interposed between the local digit line structures and the global digit line structures. The sense transistors are interposed between the source line structures and the global digit line structures, and are coupled to the local digit line structures and the source line structures. The read transistors are interposed between and are coupled to the sense transistors and the global digit line structures. The write transistors are interposed between and are coupled to the global digit line structures and the local digit line structures. Additional microelectronic devices, memory devices, and electronic systems are also described.

A non-conformal, highly selective liner for etch methods in semiconductor devices is described. A method comprises forming a film stack on a substrate; etching the film stack to form an opening; depositing a non-conformal liner in the opening; etching the non-conformal liner from the bottom of the opening; and selectively etching the film stack relative to the non-conformal liner to form a logic or memory hole. The non-conformal liner comprises one or more of boron, carbon, or nitrogen.

A non-conformal, highly selective liner for etch methods in semiconductor devices is described. A method comprises forming a film stack on a substrate; etching the film stack to form an opening; depositing a non-conformal liner in the opening; etching the non-conformal liner from the bottom of the opening; and selectively etching the film stack relative to the non-conformal liner to form a logic or memory hole. The non-conformal liner comprises one or more of boron, carbon, or nitrogen.

A movable piezo element and to a method for producing the element are provided. The movable piezo element may have a structured substrate, in which an intermediate layer is arranged between a first substrate layer and a second substrate layer. The element may also have a first electrode layer. The element may also have a second electrode layer arranged on the ferroelectric, piezoelectric, or flexoelectric layer. The second substrate layer may be structured such that at least one bar of the second substrate layer is formed. The bar may be clamped on one side and may be physically spaced from the first substrate layer. A surface of the bar facing away from the first substrate layer, and/or a lateral surface of the bar, may be at least partly covered by another layer.