Patent classifications
H10B63/10
PHASE CHANGE MEMORY UNIT AND PREPARATION METHOD THEREFOR
The present invention disclosures a phase change memory unit, wherein comprising from bottom to top: a bottom electrode, a heating electrode, a phase change unit and a top electrode, the phase change unit is a longitudinally arranged column, which comprises: a cylindrical selector layer, a circular barrier layer and a circular phase change material layer form inside to outside; wherein, the bottom electrode, the heating electrode and the circular phase change material layer are sequentially connected, and the selector layer is connected to the top electrode. The present invention using trench sidewall deposition or via filling, forming the cylindrical phase change unit which is a circular nested structure, which can improve reliability of a device, greatly reduce volume of a phase change operation area and heat energy required, thus heating efficiency is improved obviously, the power consumption of the device is reduced, and high-density storage is realized.
SEMICONDUCTOR MEMORY DEVICES
A semiconductor memory device comprises a substrate, a first conductive line extending in a first direction on the substrate, a second conductive line extending in a second direction on the first conductive line, a memory cell between the first and the second conductive lines, and a spacer covering a part of a side wall of the memory cell, wherein the memory cell includes a first electrode connected to the first conductive line, a second electrode connected to the second conductive line, and an information storage pattern between the first and second electrodes, wherein the spacer covers a side wall of the information storage pattern and a side wall of the second electrode, but not side walls of the first electrode, and the first electrode is wider than the information storage pattern at a portion on which the first electrode and the information storage pattern contact to each other.
SEMICONDUCTOR MEMORY DEVICES
A semiconductor memory device comprises a substrate, a first conductive line extending in a first direction on the substrate, a second conductive line extending in a second direction on the first conductive line, a memory cell between the first and the second conductive lines, and a spacer covering a part of a side wall of the memory cell, wherein the memory cell includes a first electrode connected to the first conductive line, a second electrode connected to the second conductive line, and an information storage pattern between the first and second electrodes, wherein the spacer covers a side wall of the information storage pattern and a side wall of the second electrode, but not side walls of the first electrode, and the first electrode is wider than the information storage pattern at a portion on which the first electrode and the information storage pattern contact to each other.
Cu-doped Sb-Te system phase change material, phase change memory and preparation method thereof
A Cu-doped Sb.sub.2Te.sub.3 system phase change material, a phase change memory, and a preparation method thereof belonging to the technical field of micro-nano electronics are provided. A Sb—Te system phase change material is doped with Cu element to form Cu.sub.3Te.sub.2 bonds with both tetrahedral and octahedral structures in the case of local enrichment of Cu. The strongly bonded tetrahedral structure improves the amorphous stability and data retention capability of the Sb—Te system phase change material, and the octahedral structure of the crystal configuration improves the crystallization speed of the Sb—Te system phase change material. A phase change memory including the phase change material and a preparation method of the phase change material are also provided. Through the phase change material provided by the invention, both the speed and amorphous stability of the device are improved, and the comprehensive performance of the phase change memory is also enhanced.
Cu-doped Sb-Te system phase change material, phase change memory and preparation method thereof
A Cu-doped Sb.sub.2Te.sub.3 system phase change material, a phase change memory, and a preparation method thereof belonging to the technical field of micro-nano electronics are provided. A Sb—Te system phase change material is doped with Cu element to form Cu.sub.3Te.sub.2 bonds with both tetrahedral and octahedral structures in the case of local enrichment of Cu. The strongly bonded tetrahedral structure improves the amorphous stability and data retention capability of the Sb—Te system phase change material, and the octahedral structure of the crystal configuration improves the crystallization speed of the Sb—Te system phase change material. A phase change memory including the phase change material and a preparation method of the phase change material are also provided. Through the phase change material provided by the invention, both the speed and amorphous stability of the device are improved, and the comprehensive performance of the phase change memory is also enhanced.
MEMORY DEVICE INCLUDING PHASE-CHANGE MATERIAL
A memory device including a phase-change material includes: a substrate; a first memory cell including a first selection layer and a first phase-change material layer, and a second memory cell including a second selection layer and a second phase-change material layer, wherein the first memory cell and the second memory cell are arranged apart from each other with an insulating layer therebetween in a normal direction of the substrate, wherein the first phase-change material layer and the second phase-change material layer include: a first layer including a thermal confinement material; and a second layer including a phase-change material, respectively, wherein the first layer and the second layer extend in a direction vertical to the substrate, and wherein the first phase-change material layer is physically isolated from the second phase-change material layer by the insulating layer.
MEMORY DEVICE INCLUDING PHASE-CHANGE MATERIAL
A memory device including a phase-change material includes: a substrate; a first memory cell including a first selection layer and a first phase-change material layer, and a second memory cell including a second selection layer and a second phase-change material layer, wherein the first memory cell and the second memory cell are arranged apart from each other with an insulating layer therebetween in a normal direction of the substrate, wherein the first phase-change material layer and the second phase-change material layer include: a first layer including a thermal confinement material; and a second layer including a phase-change material, respectively, wherein the first layer and the second layer extend in a direction vertical to the substrate, and wherein the first phase-change material layer is physically isolated from the second phase-change material layer by the insulating layer.
Socket structure for spike current suppression in a memory array
Systems, methods, and apparatus related to spike current suppression in a memory array. In one approach, a memory device includes a memory array having a cross-point memory architecture. The memory array has access lines (e.g., word lines and/or bit lines) configured to access memory cells of the memory array. Each access line has left and right portions. A conductive layer is positioned in the access line between the left and right portions. The conductive layer is formed in a socket that has been etched or otherwise formed in the access line to provide an opening. This opening is filled by the conductive layer. The conductive layer electrically connects the left and right portions of the access line to a via. A driver is electrically connected to the via for generating a voltage on the access line for accessing one or more memory cells. To reduce electrical discharge associated with current spikes, a first resistive film is formed in the access line between the left portion and the conductive layer, and a second resistive film is formed in the access line between the right portion and the conductive layer.
Phase change memory cell resistive liner
A phase change memory (PCM) cell includes a first electrode, a heater electrically connected to the first electrode, a PCM material electrically connected to the heater, a second electrode electrically connected to the PCM material, and a resistive liner in direct contact with and electrically connected to a sidewall of the heater and to the PCM material.
Memory device containing dual etch stop layers for selector elements and method of making the same
A refractory metal-containing etch stop layer, a ruthenium etch stop layer, and a conductive material layer can be sequentially formed over an electrode layer and a selector material layer. A sequence of anisotropic etch processes can be employed to etch the conductive material layer selective to the ruthenium etch stop layer, to etch the ruthenium etch stop layer selective to the refractory metal-containing etch stop layer, and to etch the refractory metal-containing etch stop layer within minimal overetch into the electrode layer. The selector material layer can be subsequently anisotropically etched without exposure to the plasma of etchant gases for etching the refractory metal-containing etch stop layer and the conductive material layer, which may include a fluorine-containing plasma that can damage the selector material.