A memory device according to an embodiment includes a first conductive layer, a second conductive layer, a variable resistance layer disposed between the first conductive layer and the second conductive layer, and an organic molecular layer disposed between the variable resistance layer and the second conductive layer and containing organic molecules. Each of the organic molecules includes a first fused polycyclic unit having a first HOMO level, a second fused polycyclic unit having a second HOMO level higher in energy than the first HOMO level, and a third fused polycyclic unit disposed between the first fused polycyclic unit and the second fused polycyclic unit. The third fused polycyclic unit has a third HOMO level higher in energy than the first HOMO level and the second HOMO level.

Methods for passivating a nanotube fabric layer within a nanotube switching device to prevent or otherwise limit the encroachment of an adjacent material layer are disclosed. In some embodiments, a sacrificial material is implanted within a porous nanotube fabric layer to fill in the voids within the porous nanotube fabric layer while one or more other material layers are applied adjacent to the nanotube fabric layer. Once the other material layers are in place, the sacrificial material is removed. In other embodiments, a non-sacrificial filler material (selected and deposited in such a way as to not impair the switching function of the nanotube fabric layer) is used to form a barrier layer within a nanotube fabric layer. In other embodiments, individual nanotube elements are combined with and nanoscopic particles to limit the porosity of a nanotube fabric layer.

A display panel, a method for fabricating the same and a display device are disclosed. The display panel includes a top emission AMOLED display sub-panel, a normally-white mode reflective display sub-panel provided on the top emission AMOLED display sub-panel, and a switching element configured to turn on the top emission AMOLED display sub-panel and turn off the normally-white mode reflective display sub-panel according to a received first instruction, and turn on the normally-white mode reflective display sub-panel and turn off the top emission AMOLED display sub-panel according to a received second instruction. By fabricating the normally-white mode reflective display sub-panel on the top emission AMOLED display sub-panel, it is possible to switch, on one operation interface, to the normally-white mode reflective sub-panel to achieve a good display effect under strong light, or to the top emission AMOLED display sub-panel to achieve viewing color content. The display panel and the corresponding display device are easy to operate and simple in structure.

Various embodiments provide a thin film transistor (TFT), a fabrication method thereof, and a display apparatus including the TFT. A carbon nanotube layer is formed over a substrate. The carbon nanotube layer includes a first plurality of carbon nanotubes. A plurality of gaps are formed through the carbon nanotube layer to provide a first patterned carbon nanotube layer. Carbon nanotube structures each including a second plurality of carbon nanotubes are formed in the plurality of gaps. The carbon nanotube structures have a carrier mobility different from the first patterned carbon nanotube layer, thereby forming an active layer for forming active structures of the thin-film transistor.

A non-volatile memory device includes a floating gate for charging and discharging of charges over a substrate. The floating gate comprises a linker layer formed over the substrate and including linkers to be bonded to metal ions and metallic nanoparticles formed out of the metal ions over the linker layer.

Disclosed herein are redox-active 6-oxoverdazyl polymers having structures (S1) and (S2) synthesized via ring-opening metathesis polymerization (ROMP) and their solution, bulk, and thin-film properties investigated. Detailed studies of the ROMP method employed confirmed that stable radical polymers with controlled molecular weights and narrow molecular weight distributions (<1.2) were produced. Thermal gravimetric analysis of a representative example of the title polymers demonstrated stability up to 190 C., while differential scanning calorimetry studies revealed a glass transition temperature of 152 C. An ultrathin memristor device was produced using these polymers, namely a 10 nm homogeneous thin film of poly-[1,5-diisopropyl-3-(cis-5-norbornene-exo-2,3-dicarboxiimide)-6-oxoverdazyl] (P6OV), a poly-radical with three tunable charge states per each radical monomer: positive, neutral and negative.

A molecular memory recording molecular polarization of a single-molecule electret, and the single-molecule electret includes a cluster skeleton 100 having a continuous hole 101 and a plurality of stable ionic sites 102a, 102b and a metal ion M. The molecular polarization is shown in a state in which the metal ion is included in the stable ionic site. The molecular polarization is changed by movement of the metal ion to the other hollow stable ionic site by application of an electric field. The recordkeeping time of the molecular memory in a temperature range of 100 C. to 100 C. based on the ion radius of the metal ion is 3.010.sup.2 seconds to 9.110.sup.22 seconds. Based on the recordkeeping time, the molecular memory is used as any of a volatile memory, a non-volatile memory, and a storage class memory.

A molecular memory recording molecular polarization of a single-molecule electret, and the single-molecule electret includes a cluster skeleton 100 having a continuous hole 101 and a plurality of stable ionic sites 102a, 102b and a metal ion M. The molecular polarization is shown in a state in which the metal ion is included in the stable ionic site. The molecular polarization is changed by movement of the metal ion to the other hollow stable ionic site by application of an electric field. The recordkeeping time of the molecular memory in a temperature range of 100 C. to 100 C. based on the ion radius of the metal ion is 3.010.sup.2 seconds to 9.110.sup.22 seconds. Based on the recordkeeping time, the molecular memory is used as any of a volatile memory, a non-volatile memory, and a storage class memory.

A conjugated polymer layer with a built-in diode is formed by providing a first metal-chalcogenide layer over a bottom electrode. Subsequently, a second metal-chalcogenide layer is provided over and in contact with the first metal-chalcogenide layer. The first metal-chalcogenide layer has a first conductivity type and the second metal-chalcogenide layer has a second conductivity type. The plane of contact between the first and second metal-chalcogenide layers creates the p-n junction of the built-in diode. Then a polymer layer is selectively deposited on the second metal-chalcogenide layer. The second metal-chalcogenide layer provides ions to the polymer layer to change its resistivity. A top electrode is then provided over the polymer layer. An exemplary memory cell may have the following stacked structure: first electrode/n-type semiconductor/p-type semiconductor/conjugated polymer/second electrode.

The present disclosure generally relates to multi-switch storage cells (MSSCs), three-dimensional MSSC arrays, and three-dimensional MSSC memory. Multi-switch storage cells include a cell select device, multiple resistive change elements, and an intracell wiring electrically connecting the multiple resistive change elements together and to the cell select device. MSSC arrays are designed (architected) and operated to prevent inter-cell (sneak path) currents between multi-switch storage cells, which prevents stored data disturb from adjacent cells and adjacent cell data pattern sensitivity. Additionally, READ and WRITE operations may be performed on one of the multiple resistive change elements in a multi-switch storage cell without disturbing the stored data in the remaining resistive change elements. However, controlled parasitic currents may flow in the remaining resistive change elements within the cell. Isolating each multi-switch storage cell in a three-dimensional MSSC array, enables in-memory computing for applications such as data processing for machine learning and artificial intelligence.