Patent classifications
H10K19/20
Image sensor having on-chip compute circuit
In one example, an apparatus comprises: a first sensor layer, including an array of pixel cells configured to generate pixel data; and one or more semiconductor layers located beneath the first sensor layer with the one or more semiconductor layers being electrically connected to the first sensor layer via interconnects. The one or more semiconductor layers comprises on-chip compute circuits configured to receive the pixel data via the interconnects and process the pixel data, the on-chip compute circuits comprising: a machine learning (ML) model accelerator configured to implement a convolutional neural network (CNN) model to process the pixel data; a first memory to store coefficients of the CNN model and instruction codes; a second memory to store the pixel data of a frame; and a controller configured to execute the codes to control operations of the ML model accelerator, the first memory, and the second memory.
Photoelectric conversion element and solid-state imaging device
A photoelectric conversion element according to an embodiment of the present disclosure includes: a first electrode and a second electrode facing each other; and a photoelectric conversion layer provided between the first electrode and the second electrode, and including a first organic semiconductor material, a second organic semiconductor material, and a third organic semiconductor material that have mother skeletons different from one another. The first organic semiconductor material is one of fullerenes and fullerene derivatives. The second organic semiconductor material in a form of a single-layer film has a higher linear absorption coefficient of a maximal light absorption wavelength in a visible light region than a single-layer film of the first organic semiconductor material and a single-layer film of the third organic semiconductor material. The third organic semiconductor material has a value equal to or higher than a HOMO level of the second organic semiconductor material.
Photoelectric conversion element and solid-state imaging device
A photoelectric conversion element according to an embodiment of the present disclosure includes: a first electrode and a second electrode facing each other; and a photoelectric conversion layer provided between the first electrode and the second electrode, and including a first organic semiconductor material, a second organic semiconductor material, and a third organic semiconductor material that have mother skeletons different from one another. The first organic semiconductor material is one of fullerenes and fullerene derivatives. The second organic semiconductor material in a form of a single-layer film has a higher linear absorption coefficient of a maximal light absorption wavelength in a visible light region than a single-layer film of the first organic semiconductor material and a single-layer film of the third organic semiconductor material. The third organic semiconductor material has a value equal to or higher than a HOMO level of the second organic semiconductor material.
Image sensor with photoelectric conversion units arranged in different directions
An imaging device includes: a first image sensor comprising first pixels that receive incident light, and that include a first and second photoelectric conversion units that are arranged in a first direction; and a second image sensor including second pixels that receive light that has passed through the first image sensor, and that include a third and fourth photoelectric conversion units that are arranged in a second direction that is different from the first direction.
CARBON NANOTUBE (CNT) MEMORY CELL ELEMENT AND METHODS OF CONSTRUCTION
Carbon nanotube (CNT) memory cell elements and methods of forming CNT memory cell elements are provided. A CNT memory cell may comprise a CNT memory cell element, e.g., in combination with a transistor. A CNT memory cell element may include a metal/CNT layer/metal (M/CNT/M) structure formed between adjacent metal interconnect layers or between a silicided active layer (e.g., including MOSFET devices) and a metal interconnect layer. The M/CNT/M structure may be formed by a process including forming a tub opening in a dielectric region, forming a cup-shaped bottom electrode in the tub opening, forming a cup-shaped CNT layer in an interior opening defined by the cup-shaped bottom electrode, and forming a top electrode in an interior opening defined by the cup-shaped CNT layer.
Imaging device, stacked imaging device, and solid-state imaging apparatus
An imaging device includes: a first electrode; a charge storage electrode disposed at a distance from the first electrode; a photoelectric conversion layer in contact with the first electrode and above the charge storage electrode, with an insulating layer between the charge storage electrode and the photoelectric conversion layer; and a second electrode on the photoelectric conversion layer. The portion of the insulating layer between the charge storage electrode and the photoelectric conversion layer includes a first region and a second region, the first region is formed with a first insulating layer, the second region is formed with a second insulating layer, and the absolute value of the fixed charge of the material forming the second insulating layer is smaller than the absolute value of the fixed charge of the material forming the first insulating layer.
Array substrate and display device
The present disclosure provides an array substrate and a display panel. The driving circuit layer of the array substrate provided with a first thin-film transistor (TFT) and a second TFT. An exemplified active layer of a P-type TFT is formed by organic conductive polymer material. By using organic conductive polymer materials as the active layer material of the first TFT, the technical problems of the flexibility of the display substrate resulting by the characteristics of the low temperature polysilicon material are solved. The flexibility of the array substrate is enhanced.
Solid-state imaging device and electronic apparatus for miniturization of pixels and improving light detection sensitivity
There is provided a solid-state imaging device including a substrate having a pixel array unit sectioned into a matrix, a plurality of normal pixels, a plurality of phase difference detection pixels, and a plurality of adjacent pixels adjacent to the phase difference detection pixels, each provided in each of the plurality of sections, in which each of the normal pixel, the phase difference detection pixel, and the adjacent pixel has a photoelectric conversion film, and an upper electrode and a lower electrode that sandwich the photoelectric conversion film in a thickness direction of the photoelectric conversion film, and the lower electrode, in the adjacent pixel, extends from the section in which the adjacent pixel is provided to cover the section in which the phase difference detection pixel adjacent to the adjacent pixel is provided, when viewed from above the substrate.
Solid-state imaging device and electronic camera
A solid-state imaging device includes a second image sensor having an organic photoelectric conversion film transmitting a specific light, and a first image sensor which is stacked in layers on a same semiconductor substrate as that of the second image sensor and which receives the specific light having transmitted the second image sensor, in which a pixel for focus detection is provided in the second image sensor or the first image sensor. Therefore, an AF method can be realized independently of a pixel for imaging.
Solid-state imaging element and electronic device
A solid-state imaging element of the present disclosure a pixel. The pixel includes a charge accumulation unit that accumulates a charge photoelectrically converted by a photoelectric conversion unit, a reset transistor that selectively applies a reset voltage to the charge accumulation unit, an amplification transistor having a gate electrode electrically connected to the charge accumulation unit, and a selection transistor connected in series to the amplification transistor. Additionally, the solid-state imaging element includes a first wiring electrically connecting the charge accumulation unit and the gate electrode of the amplification transistor, a second wiring electrically connected to a common connection node of the amplification transistor and the selection transistor and formed along the first wiring, and a third wiring electrically connecting the amplification transistor and the selection transistor.