H10K19/202

METHOD FOR CONFIGURING RECONFIGURABLE PHYSICAL UNCLONABLE FUNCTION BASED ON DEVICE WITH SPIN-ORBIT TORQUE EFFECT

A method for configuring a reconfigurable physical unclonable function (PUF) based on a device with spin-orbit torque (SOT) effect is provided. The disclosure uses SOT or magnetic field to change the magnetic moment. After the current or magnetic field is removed, the magnetic moment returns to the easy axis direction. Under the effect of thermal fluctuation, the magnetic moment is randomly oriented in the easy axis direction. The non-volatile devices are formed into an array, the magnetic moments of all non-volatile devices are randomly distributed after a write operation. The read state can be used as a random code to implement the reconfigurable PUF. The PUF has a simple structure and guarantees security. The random code in the disclosure may be two-state or multi-state, which is related to the number of magnetic domains of the ferromagnetic layer. A large number of challenge response pairs form a strong PUF.

SOFT MEMRISTOR FOR SOFT NEUROMORPHIC SYSTEM
20210143349 · 2021-05-13 ·

The present disclosure provides a soft memristor for soft neuromorphic system including a substrate, a first electrode layer formed on the substrate, a metal diffusion barrier layer formed on the first electrode layer, a resistive switching material layer formed on the metal diffusion barrier layer, and a second electrode layer formed on the resistive switching material layer.

MEMRISTOR DEVICE, METHOD OF FABRICATING THEREOF, SYNAPTIC DEVICE INCLUDING MEMRISTOR DEVICE AND NEUROMORPHIC DEVICE INCLUDING SYNAPTIC DEVICE

Disclosed are a memristor device, a method of fabricating the same, a synaptic device including a memristor device, and a neuromorphic device including a synaptic device. The disclosed memristor device may comprise a first electrode, a second electrode disposed to be spaced apart from the first electrode; and a resistance changing layer including a copolymer between the first electrode and the second electrode. The copolymer may be a copolymer of a first monomer and a second monomer, and the first polymer formed from the first monomer may have a property that diffusion of metal ions is faster than that of the second polymer formed from the second monomer. The second polymer may have a lower diffusivity of metal ions as compared with the first polymer. The first monomer may include vinylimidazole (VI). The second monomer may include 1,3,5-trivinyl-1,3,5-trimethylcyclotrisiloxane (V3D3). The copolymer may include p(V3D3-co-VI).

Electronic switching element

An electronic switching element is described having, in sequence, a first electrode, a molecular layer bonded to a substrate, and a second electrode. The molecular layer contains compounds of formula I, R.sup.1-(A.sup.1-Z.sup.1).sub.rB.sup.1(Z.sup.2-A.sup.2).sub.s-Sp-G, wherein A.sup.1, A.sup.2, B.sup.1, Z.sup.1, Z.sup.2, Sp, G, r, and s are as defined herein, in which a mesogenic radical is bonded to the substrate via a spacer group, Sp, by means of an anchor group, G. The switching element is suitable for production of components that can operate as a memristive device for digital information storage.

ELECTRON TRANSPORT GATE CIRCUITS AND METHODS OF MANUFACTURE, OPERATION AND USE
20210019607 · 2021-01-21 ·

A circuit is disclosed that includes a first electrode, a second electrode and a plurality of quantum dot devices disposed between the first electrode and the second electrode. An impedance is coupled to the second electrode and has a value selected to conduct or block conduction of current when a coherent electron conduction band is formed by one or more of the quantum dot devices, such as with quantum dot devices in an adjacent circuit.

Cross-Point Array of Polymer Junctions with Individually-Programmed Conductances
20210020241 · 2021-01-21 ·

Programmable memory devices having a cross-point array of polymer junctions with individually-programmed conductances are provided. In one aspect, a method of forming a memory device includes: forming first metal lines on an insulating substrate; forming polymeric resistance elements on the first metal lines; and forming second metal lines over the polymeric resistance elements with a single one of the polymeric resistance elements present at each intersection of the first/second metal lines forming a cross-point array. A memory device and a method of operating a memory device are also provided.

Memory including a selector switch on a variable resistance memory cell

Embodiments include but are not limited to apparatuses and systems including memory having a memory cell including a variable resistance memory layer, and a selector switch in direct contact with the memory cell, and configured to facilitate access to the memory cell. Other embodiments may be described and claimed.

Electrostatic Discharge Protection Devices Using Carbon-Based Diodes

The present disclosure is directed toward carbon based diodes, carbon based resistive change memory elements, resistive change memory having resistive change memory elements and carbon based diodes, methods of making carbon based diodes, methods of making resistive change memory elements having carbon based diodes, and methods of making resistive change memory having resistive change memory elements having carbons based diodes. The carbon based diodes can be any suitable type of diode that can be formed using carbon allotropes, such as semiconducting single wall carbon nanotubes (s-SWCNT), semiconducting Buckminsterfullerenes (such as C60 Buckyballs), or semiconducting graphitic layers (layered graphene). The carbon based diodes can be pn junction diodes, Schottky diodes, other any other type of diode formed using a carbon allotrope. The carbon based diodes can be placed at any level of integration in a three dimensional (3D) electronic device such as integrated with components or wiring layers.

MEMORY CELL AND FORMING METHOD THEREOF

A memory cell includes a first conductive line, a lower electrode, a carbon nano-tube (CNT) layer, a middle electrode, a resistive layer, a top electrode and a second conductive line. The first conductive line is disposed over a substrate. The lower electrode is disposed over the first conductive line. The carbon nano-tube (CNT) layer is disposed over the lower electrode. The middle electrode is disposed over the carbon nano-tube layer, thereby the lower electrode, the carbon nano-tube (CNT) layer and the middle electrode constituting a nanotube memory part . The resistive layer is disposed over the middle electrode. The top electrode is disposed over the resistive layer, thereby the middle electrode, the resistive layer and the top electrode constituting a resistive memory part. The second conductive line is disposed over the top electrode.

NEUROMORPHIC DEVICE WITH OXYGEN SCAVENGING GATE

A method of fabricating a neuromorphic device includes forming a variable-resistance layer between a first terminal and a second terminal, the variable-resistance layer varies in resistance based on an oxygen concentration in the variable-resistance layer. The method further includes forming an electrolyte layer over the variable-resistance layer that is stable at room temperature and that conducts oxygen ions in accordance with an applied voltage. The method further includes forming a gate layer over the electrolyte layer to apply a voltage on the electrolyte layer and the variable-resistance layer, the gate layer formed using an oxygen scavenging material.