A method of manufacturing and resultant device are directed to an inverted wide-base double magnetic tunnel junction device having both high-efficiency and high-retention arrays. The method includes a method of manufacturing, on a common stack, a high-efficiency array and a high-retention array for an inverted wide-base double magnetic tunnel junction device. The method comprises, for the high-efficiency array and the high-retention array, forming a first magnetic tunnel junction stack (MTJ2), forming a spin conducting layer on the MTJ2, and forming a second magnetic tunnel junction stack (MTJ1) on the spin conducting layer. The first magnetic tunnel junction stack for the high-retention array has a high-retention critical dimension (CD) (HRCD) that is larger than a high-efficiency CD (HECD) of the first magnetic tunnel junction stack for the high-efficiency array. The second magnetic tunnel junction stack (MTJ1) is shorted for the high-retention array and is not shorted for the high-efficiency array.

A film forming apparatus for forming a film by magnetron sputtering includes a substrate support supporting the substrate, a holder holding a target for emitting sputtered particles, a magnet unit having a magnet, first and second movement mechanisms configured to periodically move the substrate support and the magnet unit, respectively, and a controller. The controller is configured to control the first movement mechanism and the second movement mechanism so that a phase in a periodic movement of the substrate support remains the same at a start of film formation and at an end of film formation, a phase in a periodic movement of the magnet unit remains the same at a start of film formation and at an end of film formation, and the phase in the periodic movement of the substrate support and the phase in the periodic movement of the magnet unit do not match during film formation.

A magnetic domain wall movement type magnetic recording element according to an embodiment includes: a first ferromagnetic layer which includes a ferromagnetic body; a non-magnetic layer which faces the first ferromagnetic layer; and a magnetic recording layer which faces a surface of the non-magnetic layer on a side opposite to the first ferromagnetic layer and extends in a first direction. A first surface of the magnetic recording layer which faces the non-magnetic layer has a smaller arithmetic mean roughness than a second surface opposite to the first surface.

A sputtering apparatus including a chamber, a gas supply configured to supply the chamber with a first gas and a second inert gas, the first inert gas and the second inert gas having a first evaporation point and second evaporation point, respectively, a plurality of sputter guns in an upper portion of the chamber, a chuck in a lower portion of the chamber and facing the sputter guns, the chuck configured to accommodate a substrate thereon, and a cooling unit connected to a lower portion of the chuck, the cooling unit configured to cool the chuck to a temperature less than the first evaporation point and greater than the second evaporation point, and a method of fabricating a magnetic memory device may be provided.

One illustrative MRAM cell disclosed herein includes a bottom electrode, a top electrode positioned above the bottom electrode and an MTJ (Magnetic Tunnel Junction) element positioned above the bottom electrode and below the top electrode. In this example, the MTJ element includes a bottom insulation layer positioned above the bottom electrode, a top insulation layer positioned above the bottom electrode; and a first ferromagnetic material layer positioned between the bottom insulation layer and the top insulation layer.

At least a portion of a memory cell is formed over a first substrate and at least a portion of a steering element or word or bit line of the memory cell is formed over a second substrate. The at least a portion of the memory cell is bonded to at least a portion of a steering element or word or bit line. At least one of the first or second substrate may be removed after the bonding.

Some embodiments relate to a memory device. The memory device includes a substrate comprising an inter-metal dielectric layer having a metal line, a dielectric layer over the substrate, a bottom electrode via through the dielectric layer and in contact with the metal line, a bottom electrode over the bottom electrode via, a magnetic tunneling junction (MTJ) element over the bottom electrode, and a top electrode over the MTJ element. A center portion of the bottom electrode directly above the bottom electrode via is thicker than an edge portion of the bottom electrode.

The invention provides a semiconductor structure, the semiconductor structure includes a dielectric layer, a plurality of MTJ stacked elements and at least one dummy MTJ stacked element located in the dielectric layer, a first nitride layer covering at least the sidewalls of the MTJ stacked elements and the dummy MTJ stacked elements, a second nitride layer covering the top surfaces of the dummy MTJ stacked elements, the thickness of the second nitride layer is greater than the thickness of the first nitride layer, and a plurality of contact structures located in the dielectric layer and electrically connected with each MTJ stacked element.

A manufacturing method of a memory device includes the following steps. Memory units are formed on a substrate. Each of the memory units includes a first electrode, a second electrode, and a memory material layer. The second electrode is disposed above the first electrode in a vertical direction. The memory material layer is disposed between the first electrode and the second electrode in the vertical direction. A conformal spacer layer is formed on the memory units. A non-conformal spacer layer is formed on the conformal spacer layer. A first opening is formed penetrating through a sidewall portion of the non-conformal spacer layer and a sidewall portion of the conformal spacer layer in the vertical direction.

A semiconductor device including a second magnetic tunnel junction stack aligned above a spin conductor layer above a first magnetic junction stack, a sidewall dielectric surrounding the second magnetic tunnel junction stack, a vertical side surface of the sidewall dielectric is aligned with vertical side surfaces of the spin conductor layer and the first magnetic junction stack. A method including forming a first magnetic tunnel junction stack, a spin conductor layer and a second magnetic tunnel junction stack, patterning the second magnetic tunnel junction stack, while not patterning the spin conductor layer and the first magnetic tunnel junction stack, forming a sidewall dielectric and a polymer layer on the sidewall dielectric. A method including patterning a second magnetic tunnel junction stack, while not patterning a spin conductor layer below the second magnetic tunnel junction stack nor a first magnetic tunnel junction stack below the spin conductor layer.