A method of manufacturing a magnetic random access memory device includes depositing a liner on an intermediate device including an opening in a sacrificial dielectric layer, depositing a conductive metal over the liner and in the opening, removing a portion of the conductive metal while preserving the liner and a thickness of the sacrificial dielectric layer, removing a first portion of the liner by etching, wherein the liner is recessed into the opening, depositing a plurality of metallic tunnel junction layers, forming a hardmask on the plurality of metallic tunnel junction layers, and patterning the metallic tunnel junction layers to form a metallic tunnel junction stack and simultaneously clear a second portion of the liner and a portion the sacrificial dielectric layer.

An electronic device may include a first electrode, a first piezoelectric layer electrically coupled to the first electrode, a first magnetostrictive layer above the first piezoelectric layer, a first tunnel barrier layer above the first magnetostrictive layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer a second tunnel barrier layer above the ferromagnetic layer, a second magnetostrictive layer above the second tunnel barrier layer, a second piezoelectric layer above the second magnetostrictive layer, and a third electrode electrically coupled to the second piezoelectric layer. The first piezoelectric layer may be strained responsive to voltage applied across the first and second electrodes, and the second piezoelectric layer may be strained responsive to voltage applied across the second and third electrodes.

An electronic device may include a first electrode, a first piezoelectric layer electrically coupled to the first electrode, a first magnetostrictive layer above the first piezoelectric layer, a first tunnel barrier layer above the first magnetostrictive layer, and a ferromagnetic layer above the first ferroelectric layer. The electronic device may further include a second electrode electrically coupled to the ferromagnetic layer a second tunnel barrier layer above the ferromagnetic layer, a second magnetostrictive layer above the second tunnel barrier layer, a second piezoelectric layer above the second magnetostrictive layer, and a third electrode electrically coupled to the second piezoelectric layer. The first piezoelectric layer may be strained responsive to voltage applied across the first and second electrodes, and the second piezoelectric layer may be strained responsive to voltage applied across the second and third electrodes.

A magnetic tunnel junction (MTJ) element includes a reference layer, a tunnel barrier layer, a free layer, and a dusting layer. The reference layer has a fixed magnetic orientation. The tunnel barrier layer is disposed on the reference layer, and includes an insulating material. The free layer has a changeable magnetic orientation, and includes a first surface and a second surface. The second surface is disposed to confront the tunnel barrier layer and opposite to the first surface. The dusting layer is formed on one of the first and second surfaces of the free layer, and includes a non-magnetic metal. Another aspect of the MTJ element, and a method for manufacturing the MTJ element are also disclosed.

A magnetic tunnel junction (MTJ) element includes a reference layer, a tunnel barrier layer, a free layer, and a dusting layer. The reference layer has a fixed magnetic orientation. The tunnel barrier layer is disposed on the reference layer, and includes an insulating material. The free layer has a changeable magnetic orientation, and includes a first surface and a second surface. The second surface is disposed to confront the tunnel barrier layer and opposite to the first surface. The dusting layer is formed on one of the first and second surfaces of the free layer, and includes a non-magnetic metal. Another aspect of the MTJ element, and a method for manufacturing the MTJ element are also disclosed.

A semiconductor device including a magnetic tunnel junction (MTJ) stack, a first metal line above the MTJ stack and a magnetoelectric material layer above the first metal line. A semiconductor device including an array of magnetic tunnel junction (MTJ) stacks, a first metal line connected physically and electrically to a top electrode of each MTJ stack in a row of the array of MTJ stacks and a magnetoelectric material layer above the first metal line, connected physically and electrically to the first metal line. A method including forming an array of magnetic tunnel junction (MTJ) stacks, forming a first metal line above a row of the array of MTJ stacks, and forming a magnetoelectric material layer above the first metal line, connected physically and electrically to the first metal line.

A semiconductor device including a magnetic tunnel junction (MTJ) stack, a first metal line above the MTJ stack and a magnetoelectric material layer above the first metal line. A semiconductor device including an array of magnetic tunnel junction (MTJ) stacks, a first metal line connected physically and electrically to a top electrode of each MTJ stack in a row of the array of MTJ stacks and a magnetoelectric material layer above the first metal line, connected physically and electrically to the first metal line. A method including forming an array of magnetic tunnel junction (MTJ) stacks, forming a first metal line above a row of the array of MTJ stacks, and forming a magnetoelectric material layer above the first metal line, connected physically and electrically to the first metal line.

An electronic device may include a first electrode, a first magnetostrictive layer coupled to the first electrode, a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer, a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers, a second magnetostrictive layer above the stack of ferromagnetic and insulating layers, and a third electrode electrically coupled to the second magnetostrictive layer. At least one ferromagnetic layer below the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.

An electronic device may include a first electrode, a first magnetostrictive layer coupled to the first electrode, a plurality of alternating ferromagnetic and insulating layers stacked above the first magnetostrictive layer, a second electrode electrically coupled to an intermediate ferromagnetic layer in the stack of ferromagnetic and insulating layers, a second magnetostrictive layer above the stack of ferromagnetic and insulating layers, and a third electrode electrically coupled to the second magnetostrictive layer. At least one ferromagnetic layer below the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a first voltage applied across the first and second electrodes, and at least one ferromagnetic layer above the intermediate ferromagnetic layer may be switchable between different polarization states responsive to a second voltage applied across the second and third electrodes.

An IC structure comprises an MTJ cell, a transistor, a first word line, and a second word line. The transistor is electrically coupled to the MTJ cell. The transistor comprises a first gate terminal and a second gate terminal independent of the first gate terminal. The first word line is electrically coupled to the first gate terminal of the transistor. The second word line is electrically coupled to the second gate terminal of the transistor. A resistance state of the MTJ cell is dependent on a first word line voltage applied to the first word line and a second word line voltage applied to the second word line, and the resistance state of the MTJ cell follows an AND gate logic or an OR gate logic.