A method for forming a semiconductor device includes the steps of providing a substrate having a memory region and a logic region, forming a memory stack structure on the memory region, forming a passivation layer covering a top surface and sidewalls of the memory stack structure, forming a first interlayer dielectric layer on the passivation layer, performing a post-polishing etching back process to remove a portion of the first interlayer dielectric layer and a portion of the passivation layer on the top surface of the memory stack structure, forming a second interlayer dielectric layer on the first interlayer dielectric layer and directly contacting the passivation layer, and forming an upper contact structure through the second interlayer dielectric layer and the passivation layer on the top surface of the memory stack structure to contact the memory stack structure.

Provided are a magnetic tunneling junction device having a relatively high tunneling magnetoresistance (TMR) ratio; and a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes: a pinned layer having a first surface and a second surface opposite the first surface; a seed layer disposed in contact with the first surface of the pinned layer; a free layer disposed to face the second surface of the pinned layer; and a tunnel barrier layer disposed between the pinned layer and the free layer, wherein the seed layer includes at least one amorphous material selected from CoFeX and CoFeXTa, and the X includes at least one element selected from niobium (Nb), molybdenum (Mo), tungsten (W), chromium (Cr), zirconium (Zr), and hafnium (Hf). The seed layer may not include boron.

Provided are a magnetic tunneling junction device having a relatively high tunneling magnetoresistance (TMR) ratio; and a memory device including the magnetic tunneling junction device. The magnetic tunneling junction device includes: a pinned layer having a first surface and a second surface opposite the first surface; a seed layer disposed in contact with the first surface of the pinned layer; a free layer disposed to face the second surface of the pinned layer; and a tunnel barrier layer disposed between the pinned layer and the free layer, wherein the seed layer includes at least one amorphous material selected from CoFeX and CoFeXTa, and the X includes at least one element selected from niobium (Nb), molybdenum (Mo), tungsten (W), chromium (Cr), zirconium (Zr), and hafnium (Hf). The seed layer may not include boron.

An electrode structure with an alloy interface is provided. In one aspect, a method of forming a contact structure includes: patterning a via in a first dielectric layer; depositing a barrier layer onto the first dielectric layer, lining the via; depositing and polishing a first metal layer (Element A) into the via to form a contact in the via; depositing a second metal layer (Element B) onto the contact in the via; annealing the first and second metal layers under conditions sufficient to form an alloy AB; depositing a third metal layer onto the second metal layer; patterning the second and third metal layers into a pedestal stack over the contact to form an electrode over the contact, wherein the alloy AB is present at an interface of the electrode and the contact; and depositing a second dielectric that surrounds the pedestal stack. A contact structure is also provided.

A rotation angle detector is smaller and less expensive and can improve detection accuracy. The rotation angle detector includes a ring magnet rotatable together with a hollow shaft and including magnetized sections having different poles and being alternately arranged in a direction of rotation of the hollow shaft, and a magnetoresistive sensor that detects a magnetic flux of the magnetized sections. The magnetized sections include an origin-indicator magnetized section that generates a magnetic flux indicating completion of one rotation of the hollow shaft. A controller electrically connected to the rotation angle detector can detect both the rotation angle of the hollow shaft and the origin using the single ring magnet and the single MR sensor. The rotation angle detector is thus smaller and less expensive and can improve detection accuracy.

A rotation angle detector is smaller and less expensive and can improve detection accuracy. The rotation angle detector includes a ring magnet rotatable together with a hollow shaft and including magnetized sections having different poles and being alternately arranged in a direction of rotation of the hollow shaft, and a magnetoresistive sensor that detects a magnetic flux of the magnetized sections. The magnetized sections include an origin-indicator magnetized section that generates a magnetic flux indicating completion of one rotation of the hollow shaft. A controller electrically connected to the rotation angle detector can detect both the rotation angle of the hollow shaft and the origin using the single ring magnet and the single MR sensor. The rotation angle detector is thus smaller and less expensive and can improve detection accuracy.

A memory device includes a transistor and a memory cell. The transistor includes a gate electrode disposed over a substrate and source/drain regions in the substrate beside the gate electrode. The memory cell is disposed over the transistor and includes a bottom electrode electrically connected to one of the source/drain regions, a top electrode disposed over the bottom electrode, and a first bit and a second bit separated from each other and disposed between the bottom electrode and the top electrode.

A memory device includes a transistor and a memory cell. The transistor includes a gate electrode disposed over a substrate and source/drain regions in the substrate beside the gate electrode. The memory cell is disposed over the transistor and includes a bottom electrode electrically connected to one of the source/drain regions, a top electrode disposed over the bottom electrode, and a first bit and a second bit separated from each other and disposed between the bottom electrode and the top electrode.

A semiconductor memory structure includes bottom electrodes formed over a substrate. The structure also includes first magnetic tunneling junction (MTJ) elements formed over the bottom electrodes in a first region and a second region of the substrate. The structure also includes second MTJ elements formed over the first MTJ elements in the first region and the second region. The structure also includes top electrodes formed over the second MTJ elements. The first MTJ elements in the first region are narrower than the second MTJ elements in the first region, and the second MTJ elements in the second region are narrower than the first MTJ elements in the second region.

A semiconductor memory structure includes bottom electrodes formed over a substrate. The structure also includes first magnetic tunneling junction (MTJ) elements formed over the bottom electrodes in a first region and a second region of the substrate. The structure also includes second MTJ elements formed over the first MTJ elements in the first region and the second region. The structure also includes top electrodes formed over the second MTJ elements. The first MTJ elements in the first region are narrower than the second MTJ elements in the first region, and the second MTJ elements in the second region are narrower than the first MTJ elements in the second region.