Patent classifications
H10N50/80
SEMICONDUCTOR MEMORY STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor memory structure includes bottom electrodes formed over a substrate. The structure also includes first magnetic tunneling junction (MTJ) elements formed over the bottom electrodes in a first region and a second region of the substrate. The structure also includes second MTJ elements formed over the first MTJ elements in the first region and the second region. The structure also includes top electrodes formed over the second MTJ elements. The first MTJ elements in the first region are narrower than the second MTJ elements in the first region, and the second MTJ elements in the second region are narrower than the first MTJ elements in the second region.
SEMICONDUCTOR MEMORY STRUCTURE AND METHOD FOR FORMING THE SAME
A semiconductor memory structure includes bottom electrodes formed over a substrate. The structure also includes first magnetic tunneling junction (MTJ) elements formed over the bottom electrodes in a first region and a second region of the substrate. The structure also includes second MTJ elements formed over the first MTJ elements in the first region and the second region. The structure also includes top electrodes formed over the second MTJ elements. The first MTJ elements in the first region are narrower than the second MTJ elements in the first region, and the second MTJ elements in the second region are narrower than the first MTJ elements in the second region.
FUNCTION SWITCHABLE MAGNETIC RANDOM ACCESS MEMORY AND METHOD FOR MANUFACTURING THE SAME
Provided are a function switchable random access memory, including: two electromagnetic portions configured to connect a current; a magnetic recording portion between the two electromagnetic portions and including a spin-orbit coupling layer and a magnetic tunnel junction; a pinning region between each of the electromagnetic portions and the magnetic recording portion; a cut-off region on a side of each of the electromagnetic portions opposite to the pinning region, the spin-orbit coupling layer is configured to generate a spin current under an action of the current; the two electromagnetic portions is configured to generate two magnetic domains with magnetization pointing in opposite directions under an action of the spin current; the magnetic tunnel junction is configured to generate a magnetic domain wall based on the two opposite magnetic domains and is configured to drive the magnetic domain wall to reciprocate under the action of the spin current.
Semiconductor device
A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.
Semiconductor device
A semiconductor device includes a substrate, a first dielectric layer, a second dielectric layer, and a third dielectric layer. The first dielectric layer is disposed on the substrate, around a first metal interconnection. The second dielectric layer is disposed on the first dielectric layer, around a via and a second metal interconnection. The second metal interconnection directly contacts the first metal interconnection. The third dielectric layer is disposed on the second dielectric layer, around a first magnetic tunneling junction (MTJ) structure and a third metal interconnection. The third metal interconnection directly contacts the first MTJ structure and the second metal interconnection, and the first MTJ structure directly contacts the via.
ARTIFICIAL ANTIFERROMAGNETIC STRUCTURE AND STORAGE ELEMENT
Disclosed are an artificial antiferromagnetic structure and a storage element. The artificial antiferromagnetic structure includes a first metal layer, an artificially synthesized antiferromagnetic layer and a second metal layer that are stacked in sequence, wherein there is an interfacial DM (Dzyaloshinskii-Moriya) interaction at an interface between the metal layer and the artificially synthesized antiferromagnetic layer, such that there is a first interfacial DM interaction between the first metal layer and the artificially synthesized antiferromagnetic layer, there is a second interfacial DM interaction between the second metal layer and the artificially synthesized antiferromagnetic layer, and the first interfacial DM interaction is different from the second interfacial DM interaction. The artificially synthesized antiferromagnetic layer forms a stable chiral Néel magnetic domain wall due to a strong interfacial DM interaction.
SOT-MRAM with shared selector
A magnetic memory device includes a magnetic tunnel junction (MTJ) stack, a spin-orbit torque (SOT) induction wiring disposed over the MTJ stack, a first terminal coupled to a first end of the SOT induction wiring, a second terminal coupled to a second end of the SOT induction wiring, and a shared selector layer coupled to the first terminal.
Magnetic tunnel junction device and method
In an embodiment, a device includes: a magnetoresistive random access memory cell including: a bottom electrode; a reference layer over the bottom electrode; a tunnel barrier layer over the reference layer, the tunnel barrier layer including a first composition of magnesium and oxygen; a free layer over the tunnel barrier layer, the free layer having a lesser coercivity than the reference layer; a cap layer over the free layer, the cap layer including a second composition of magnesium and oxygen, the second composition of magnesium and oxygen having a greater atomic concentration of oxygen and a lesser atomic concentration of magnesium than the first composition of magnesium and oxygen; and a top electrode over the cap layer.
Magnetic tunnel junction device and method
In an embodiment, a device includes: a magnetoresistive random access memory cell including: a bottom electrode; a reference layer over the bottom electrode; a tunnel barrier layer over the reference layer, the tunnel barrier layer including a first composition of magnesium and oxygen; a free layer over the tunnel barrier layer, the free layer having a lesser coercivity than the reference layer; a cap layer over the free layer, the cap layer including a second composition of magnesium and oxygen, the second composition of magnesium and oxygen having a greater atomic concentration of oxygen and a lesser atomic concentration of magnesium than the first composition of magnesium and oxygen; and a top electrode over the cap layer.
MAGNETORESISTIVE EFFECT ELEMENT CONTAINING TWO NON-MAGNETIC LAYERS WITH DIFFERENT CRYSTAL STRUCTURES
A magnetoresistive effect element includes: a first ferromagnetic layer; a second ferromagnetic layer; and a non-magnetic layer provided between the first ferromagnetic layer and the second ferromagnetic layer, wherein the non-magnetic layer includes a first layer and a second layer, and wherein a lattice constant α of the first layer and a lattice constant β of the second layer satisfy a relationship of β−0.04×α≤2×α≤β+0.04 ×α.