An SOI semiconductor structure, including a substrate layer formed on a back side and a semiconductor layer of a second conductivity type formed on a front side, an insulating layer being disposed between the substrate layer and the semiconductor layer, a three-dimensional Hall sensor structure having a sensor region made up of a monolithic semiconductor body being formed in the semiconductor layer, and the semiconductor body extending from an underside up to the front side, at least three first metallic terminal contacts being formed on the upper side, and at least three second metallic terminal contacts being formed on the underside, the first terminal contacts being offset with respect to the second terminal contacts in a projection perpendicular to the front side, each first terminal contact and each second terminal contact being formed in each case on a highly doped semiconductor contact region of a second conductivity type.

A spin-orbit-torque magnetization rotational element includes: a spin-orbit torque wiring layer which extends in an X direction; and a first ferromagnetic layer which is laminated on the spin-orbit torque wiring layer, wherein the first ferromagnetic layer has shape anisotropy and has a major axis in a Y direction orthogonal to the X direction on a plane in which the spin-orbit torque wiring layer extends, and wherein the easy axis of magnetization of the first ferromagnetic layer is inclined with respect to the X direction and the Y direction orthogonal to the X direction on a plane in which the spin-orbit torque wiring layer extends.

A semiconductor stack for a Hall effect device, which comprises: a bottom barrier comprising Al.sub.xGa.sub.1-xAs, a channel comprising In.sub.yGa.sub.1-yAs, on the bottom barrier, a channel barrier with a thickness which is at least 2 nm and which is smaller than or equal to 15 nm, and which at least comprises a first layer comprising Al.sub.zGa.sub.1-zAs with 0.1≤z≤0.22, wherein the first layer has a thickness of at least 2 nm, wherein a conduction band edge of the bottom barrier and the first layer is higher than a conduction band edge of the channel, a doping layer comprising a composition of Al, Ga and As and doped with n-type material, a top barrier comprising a composition of Al, Ga and As.

Various embodiments of the present disclosure are directed towards a memory device including a shunting layer overlying a spin orbit torque (SOT) layer. A magnetic tunnel junction (MTJ) structure overlies a semiconductor substrate. The MTJ structure includes a free layer, a reference layer, and a tunnel barrier layer disposed between the free and reference layers. A bottom electrode via (BEVA) underlies the MTJ structure, where the BEVA is laterally offset from the MTJ structure by a lateral distance. The SOT layer is disposed vertically between the BEVA and the MTJ structure, where the SOT layer continuously extends along the lateral distance. The shunting layer extends across an upper surface of the SOT layer and extends across at least a portion of the lateral distance.

Embodiments of the invention include a method for fabricating a magnetoresistive random-access memory (MRAM) structure and the resulting structure. A first type of metal is formed on an interlayer dielectric layer with a plurality of embedded contacts, where the first type of metal exhibits spin Hall effect (SHE) properties. At least one spin-orbit torque (SOT) MRAM cell is formed on the first type of metal. One or more recesses surrounding the at least one SOT-MRAM cell are created by recessing exposed portions of the first type of metal. A second type of metal is formed in the one or more recesses, where the second type of metal has lower resistivity than the first type of metal.

A magnetic structure capable of field-free spin-orbit torque switching includes a spin-orbit coupling base layer and a ferromagnetic layer formed thereon. The spin-orbit coupling base layer is made from a particular crystal material. The ferromagnetic layer has magnetization perpendicular to a plane coupled to the spin-orbit coupling base layer, and is made from a particular ferromagnetic material with perpendicular magnetic anisotropy. The perpendicular magnetization of the ferromagnetic layer is switchable by an in plane current applied to the spin-orbit coupling base layer without application of an external magnetic field. A memory device and a production method regarding the magnetic structure are also provided.

A circuit for sensing a current comprises a substrate having a first and a second major surface, the second major surface being opposite to the first major surface. At least one magnetic field sensing element is arranged on the first major surface of the substrate and is suitable for sensing a magnetic field caused by a current flow in a current conductor coupled to the second major surface. The substrate also comprises at least one insulation layer, substantially buried between the first major surface and the second major surface of the substrate.

A tunnel barrier layer includes a non-magnetic oxide, wherein a crystal structure of the tunnel barrier layer includes both an ordered spinel structure and a disordered spinel structure.

A method of manufacturing a magnetoresistive device may comprise forming a first magnetic region, an intermediate region, and a second magnetic region of a magnetoresistive stack above a via; removing at least a portion of the second magnetic region using a first etch; removing at least a portion of the intermediate region and at least a portion of the first magnetic region using a second etch; removing at least a portion of material redeposited on the magnetoresistive stack using a third etch; and rendering at least a portion of the redeposited material remaining on the magnetoresistive stack electrically non-conductive.

Various embodiments include an electrical device comprising an antiferromagnetic topological insulator having a surface comprising a bulk domain wall configured to support a first type of 1D chiral channel, a surface step configured to support a second 1D chiral channel and intersecting the bulk domain wall to form thereat a quantum point junction.