In a described example, an apparatus includes: a lead frame having a first portion and having a second portion electrically isolated from the first portion, the first portion having a side surface normal to a planar opposite surface, and having a recessed edge that is notched or chamfered and extending between the side surface and a planar device side surface; a spacer dielectric mounted to the planar device side surface and partially covered by the first portion, and extending beyond the first portion; a semiconductor die mounted to the spacer dielectric, the semiconductor die partially covered by the spacer dielectric and extending beyond the spacer dielectric; the second portion of the lead frame comprising leads coupled to the semiconductor die by electrical connections; and mold compound covering the semiconductor die, the electrical connections, the spacer dielectric, and partially covering the first portion and the second portion.

A current sensor IC includes a unitary lead frame having a primary conductor with a first thickness and a secondary lead having a second thickness less than the first thickness. A semiconductor die adjacent to the primary conductor includes a magnetic field sensing circuit to sense a magnetic field associated with the current and generate a secondary signal indicative of the current. An insulation structure is disposed between the primary conductor and the die. A mold material encloses a first portion of the secondary lead and a second portion of the secondary lead that is exposed outside of the package has the second thickness. A method of manufacturing a current sensor IC includes providing a unitary lead frame sheet having a first thickness, decreasing a thickness of a portion of the sheet to provide a first portion with the first thickness and a second portion with a smaller thickness, and stamping the sheet to form a repeating lead frame pattern, with each pattern including a primary conductor formed from the first portion and secondary leads formed from the second portion.

Disclosed herein is a Hall sensor including a Hall element having a first principal surface, and a first magnetic body arranged on a side of the first principal surface, in which the first magnetic body has a first surface facing the first principal surface, and an area of a projection surface of the first magnetic body when viewed in plan from an opposite side of the Hall element is larger than an area of the first surface.

A magnetic field sensor may include a semiconductor structure having a planar surface, and first, second, and third sensing devices. The semiconductor structure may include a semiconductor member having a two-dimensional electron gas therein, and an insulator member disposed on the semiconductor member. The first sensing device may be configured to sense magnetic field along a first axis parallel to the planar surface. The second sensing device may be configured to sense magnetic field along a second axis parallel to the planar surface, and orthogonal to the first axis. The third sensing device may be configured to sense a magnetic field along a third axis normal to the planar surface. Each of the first, second, and third sensing devices may be formed in the semiconductor structure and may include electrodes that extend from the insulator member to the two-dimensional electron gas.

A spin-orbit torque magnetization rotational element includes: a first insulating layer with first and second openings; a first conductive portion formed inside the first opening; a second conductive portion formed inside the second opening; a spin-orbit torque wiring located in a first direction and extends in a second direction over the first and second conductive portions; and a first ferromagnetic layer located on the side opposite to the first insulating layer in the spin-orbit torque wiring, wherein the first conductive portion includes a first surface facing the spin-orbit torque wiring, a second surface facing the first surface and is located at a position farther from the spin-orbit torque wiring than the first surface, and a side surface connecting the first surface and the second surface, and the side surface includes a continuous major surface and a third surface inclined or curved and is discontinuous with respect to the major surface.

An SOI semiconductor structure, including a substrate layer formed on a back side and a semiconductor layer of a second conductivity type formed on a front side, an insulating layer being disposed between the substrate layer and the semiconductor layer, a three-dimensional Hall sensor structure having a sensor region made up of a monolithic semiconductor body being formed in the semiconductor layer, and the semiconductor body extending from an underside up to the front side, at least three first metallic terminal contacts being formed on the upper side, and at least three second metallic terminal contacts being formed on the underside, the first terminal contacts being offset with respect to the second terminal contacts in a projection perpendicular to the front side, each first terminal contact and each second terminal contact being formed in each case on a highly doped semiconductor contact region of a second conductivity type.

Provided is a Hall element that detects a magnetic field. The Hall element includes a substrate including a semiconductor region, a first drive electrode arranged on the substrate, a first ground electrode arranged on the substrate separately from the first drive electrode in a first direction, a second ground electrode arranged on the substrate separately from the first drive electrode in a second direction different from the first direction, and a detection electrode group including a first electrode group that detects a Hall voltage generated by a current of components perpendicular to a surface of the substrate, the current flowing from the first drive electrode to the first ground electrode and the second ground electrode.

A magnetic memory device includes a spin-orbit torque (SOT) induction spin Hall electrode and a free layer of a magnetic tunnel junction (MTJ) stack disposed on the spin Hall electrode which is a synthetic anti-ferromagnetic structure. The free layer has a magnetic moment which is askew of the long axis of the MTJ stack and askew the direction of current flow through the spin Hall electrode. The MTJ stack internally generates a magnetic field to switch the state of the free layer. The free layer includes a first layer separated from a second layer by a spacer layer, where the first layer and the second layer may have the same or different crystalline structures.

A Hall integrated circuit including a vertical Hall element, having a first wafer and a second wafer, the second wafer including a CMOS substrate integrating a CMOS processing circuit coupled to the vertical Hall element and a stack of dielectric layers, and the first wafer including a Hall-sensor layer having a first surface and a second surface, the first and second wafers being bonded with the interposition of a dielectric layer arranged above the first surface of the Hall-sensor layer. The vertical Hall element has: at least a first Hall terminal; at least a second Hall terminal; a deep trench isolation ring extending through the Hall-sensor layer from the first surface to the second surface and enclosing and isolating a Hall sensor region of the Hall-sensor layer; and a first and a second conductive structures electrically connected to respective contact pads embedded in the stack of the second wafer.

A semiconductor device includes a storage element layer and a selector. The selector is electrically coupled to the storage element layer, and includes a first insulating layer, a second insulating layer, a third insulating layer, a first conductive layer and a second conductive layer. The first insulating layer, the second insulating layer and the third insulating layer are stacked up in sequence, wherein the second insulating layer is sandwiched in between the first insulating layer and the third insulating layer, and the first insulating layer and the third insulating layer include materials with higher band gap as compared with a material of the second insulating layer. The first conductive layer is connected to the first insulting layer, and the second conductive layer is connected to the third insulating layer.