Among other things, an apparatus comprises quantum units; and couplers among the quantum units. Each coupler is configured to couple a pair of quantum units according to a quantum Hamiltonian characterizing the quantum units and the couplers. The quantum Hamiltonian includes quantum annealer Hamiltonian and a quantum governor Hamiltonian. The quantum annealer Hamiltonian includes information bearing degrees of freedom. The quantum governor Hamiltonian includes non-information bearing degrees of freedom that are engineered to steer the dissipative dynamics of information bearing degrees of freedom.

In a masking phase, a first segment of an amorphous mask is formed on an underlying layer of a substrate. The first segment comprises a first set of trenches exposing the underlying layer. In the masking phase, a second segment of the amorphous mask is formed on the underlying layer. The second segment comprises a second set of trenches exposing the underlying layer. The segments are non-overlapping. An open end of one of the first set of trenches faces an open end of one of the second set of trenches, but the ends are separated by a portion of the amorphous mask. In a semiconductor growth phase, semiconductor material is grown, by selective area growth, in the first and second sets of trenches to form first and second sub-networks of nanowires on the underlying layer. The first and second sub-networks of nanowires are joined to form a single nanowire network.

A first aspect provides a topological quantum computing device comprising a network of semiconductor-superconductor nanowires, each nanowire comprising a length of semiconductor formed over a substrate and a coating of superconductor formed over at least part of the semiconductor; wherein at least some of the nanowires further comprise a coating of ferromagnetic insulator disposed over at least part of the semiconductor. A second aspect provides a method of fabricating a quantum or spintronic device comprising a heterostructure of semiconductor and ferromagnetic insulator, by: forming a portion of the semiconductor over a substrate in a first vacuum chamber, and growing a coating of the ferromagnetic insulator on the semiconductor by epitaxy in a second vacuum chamber connected to the first vacuum chamber by a vacuum tunnel, wherein the semiconductor comprises InAs and the ferromagnetic insulator comprises EuS.

A superconducting logic element includes a superconducting tunnel junction including first and second superconductors. First and second insulating ferromagnets in contact with the first and second superconductors, respectively, generate by magnetic proximity effect a predetermined density of spin-split states in the first and second superconductors, respectively. A writing element applies a writing current to at least a superconductor and is in contact with one of the first or second insulating ferromagnets, so that the first and second insulating ferromagnets commute, by the magnetic field generated by the applied writing current, between a state with parallel magnetization to a state with antiparallel magnetization with respect to each other. The superconducting tunnel junction includes the first or second superconductor between which an insulating layer is arranged with tunnel barrier function, the insulating layer selected between a layer selected from the group consisting of AlOx, AlN, and the first or second insulating ferromagnet.

Various techniques and apparatus permit fabrication of superconductive circuits. A niobium/aluminum oxide/niobium trilayer may be formed and individual Josephson Junctions (JJs) formed. A protective cap may protect a JJ during fabrication. A hybrid dielectric may be formed. A superconductive integrated circuit may be formed using a subtractive patterning and/or additive patterning. A superconducting metal layer may be deposited by electroplating and/or polished by chemical-mechanical planarization. The thickness of an inner layer dielectric may be controlled by a deposition process. A substrate may include a base of silicon and top layer including aluminum oxide. Depositing of superconducting metal layer may be stopped or paused to allow cooling before completion. Multiple layers may be aligned by patterning an alignment marker in a superconducting metal layer.

A system includes a substrate having a high-temperature superconductor compound film disposed thereon. A first superconducting region is formed within the film and has a first stabilized oxygen content. A second superconducting region is also formed within the film and is located adjacent to the first superconducting region. The second superconducting region has a second stabilized oxygen content. A boundary region is formed within the film and separates the first superconducting region from the second superconducting region. A voltage source is connected to the first superconducting region and the second superconducting region. The boundary region emits electromagnetic radiation responsive to an applied voltage from the voltage source to one of the first superconducting region and the second superconducting region. A current flows from the first superconducting region to the second superconducting region, or vice versa, responsive to the applied voltage.

The disclosure relates to a quantum device and method of fabricating the same. The device comprises one or more semiconductor-superconductor nanowires, each comprising a length of semiconductor material and a coating of superconductor material coated on the semiconductor material. The nanowires may be formed over a substrate. In a first aspect at least some of the nanowires are full-shell nanowires with superconductor material being coated around a full perimeter of the semiconductor material along some or all of the length of the wire, wherein the device is operable to induce at least one Majorana zero mode, MZM, in one or more active ones of the full-shell nanowires. In a second aspect at least some of the nanowires are arranged vertically relative to the plane of the substrate in the finished device.

A mixed semiconductor-superconductor platform is fabricated in phases. In a masking phase, a dielectric mask is formed on a substrate, such that the dielectric mask leaves one or more regions of the substrate exposed. In a selective area growth phase, a semiconductor material is selectively grown on the substrate in the one or more exposed regions. in a superconductor growth phase, a layer of superconducting material is formed, at least part of which is in direct contact with the selectively grown semiconductor material. The mixed semiconductor-superconductor platform comprises the selectively grown semiconductor material and the superconducting material in direct contact with the selectively grown semiconductor material.

Embodiments of a Majorana-based qubit are disclosed herein. The qubit is based on the formation of superconducting islands, some parts of which are topological (T) and some parts of which are non-topological. Also disclosed are example techniques for fabricating such qubits. In one embodiment, a semiconductor nanowire is grown, the semiconductor nanowire having a surface with an oxide layer. A dielectric insulator layer is deposited onto a portion of the oxide layer of the semiconductor nanowire, the portion being designed to operate as a non-topological segment in the quantum device. An etching process is performed on the oxide layer of the semiconductor nanowire that removes the oxide layer at the surface of the semiconductor nanowire but maintains the oxide layer in the portion having the deposited dielectric insulator layer. A superconductive layer is deposited on the surface of the semiconductor nanowire, including over the dielectric insulator layer.

A milliohm resistor is fabricated as a Josephson junction device that contains ferromagnetic or antiferromagnetic material of sufficient thickness to render the device entirely resistive between terminals. The device can have a resistance on the order of milliohms and can be consume a much smaller chip footprint than resistors of the same resistance fabricated using conventional resistive materials. Because the device can be fabricated without modification to processes used to fabricate reciprocal quantum logic (RQL) circuitry, it can easily be incorporated in RQL circuits to mitigate flux trapping or to perform other functions where very small resistances are needed. In particular, the device can burn off circulating currents induced by trapped flux without affecting the transmission of SFQ pulses through RQL circuitry.