Systems and techniques that facilitate spurious junction prevention via in-situ ion milling are provided. In various embodiments, a method can comprise forming a tunnel barrier of a Josephson junction on a substrate during a shadow evaporation process. In various instances, the method can further comprise etching an exposed portion of the tunnel barrier during the shadow evaporation process. In various embodiments, the shadow evaporation process can comprise patterning a resist stack onto the substrate. In various instances, the etching the exposed portion of the tunnel barrier can leave a protected portion of the tunnel barrier within a shadow of the resist stack. In various instances, the shadow of the resist stack can be based on a direction of the etching the exposed portion of the tunnel barrier. In various embodiments, the shadow evaporation process can further comprise depositing a first superconducting material on the substrate after the patterning the resist stack, oxidizing a surface of the first superconducting material to form the tunnel barrier, and depositing a second superconducting material over the protected portion of the tunnel barrier to form a Josephson junction. In various instances, the etching the exposed portion of the tunnel barrier can occur after the oxidizing the surface of the first superconducting material and before the depositing the second superconducting material.

Techniques for designing and fabricating quantum circuitry, including a coplanar waveguide (CPW), for quantum applications are presented. With regard to a CPW, a central conductor and two return conductor lines can be formed on a dielectric substrate, with one return conductor line on each side of the central conductor and separated from it by a space. The central conductor can have bridge portions that can be raised a desired distance above the substrate and base conductor portions situated between the bridge portions and in contact with the surface of the substrate; and/or portions of the substrate underneath the bridge portions of the central conductor can be removed such that the bridge portions, whether raised or unraised, can be the desired distance above the surface of the remaining substrate, and the base conductor portions can be in contact with other portions of the surface of the substrate that were not removed.

Provided is a quantum computing device and system. The quantum computing device includes a first qubit chip, a readout cavity structure surrounding a first end part of the first qubit chip, and a storage cavity structure surrounding a second end part of the first qubit chip, wherein the first qubit chip includes a first readout antenna disposed within the readout cavity structure, a first storage antenna disposed in the storage cavity structure, and a first qubit element provided between the first readout antenna and the first storage antenna, and wherein the first qubit element is disposed between the readout cavity structure and the storage cavity structure.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for constructing and programming quantum hardware for quantum annealing processes.

Memory devices and methods are provided. In one aspect, a memory device may comprise a first field element, a second field element, a movable magnetic element, and a first heater. The first field element may be a superconductor. The second field element may be disposed facing the first field element and at a first distance from the first field element. The movable magnetic element may be repelled by the second field element and disposed in a space between the first field element and the second field element. The first heater may be arranged near the first field element. The movable magnetic element may move toward the first field element in response to a first electric current that passes through the first heater.

The various embodiments described herein include methods, devices, and circuits for reducing or minimizing current crowding effects in manufactured superconductors. In some embodiments, a superconducting circuit includes: (1) a first component having a first connection point, the first connection point having a first width; (2) a second component having a second connection point, the second connection point having a second width that is larger than the first width; and (3) a connector electrically connecting the first connection point and the second connection point, the connector including: (a) a first taper having a first slope and a non-linear shape; (b) a second taper having a second slope; and (c) a connecting portion connecting the first taper to the second taper, the connecting portion having a third slope that is less than the first slope and less than the second slope.

On a first superconducting layer deposited on a first surface of a substrate, a first component of a resonator is pattered. On a second superconducting layer deposited on a second surface of the substrate, a second component of the resonator is patterned. The first surface and the second surface are disposed relative to each other in a non-co-planar disposition. In the substrate, a recess is created, the recess extending from the first superconducting layer to the second superconducting layer. On an inner surface of the recess, a third superconducting layer is deposited, the third superconducting layer forming a superconducting path between the first superconducting layer and the second superconducting layer. Excess material of the third superconducting layer is removed from the first surface and the second surface, forming a completed through-silicon via (TSV).

A superconducting coil of embodiments includes a substrate having a curved surface, a superconducting wire wound on the curved surface, the superconducting wire having a first region and a second region facing the first region, a first resin layer surrounding the superconducting wire and including a plurality of first particles and first resin surrounding the first particles, and a second resin layer positioned between the first region and the second region, the second resin layer covering the first resin layer and including a plurality of second particles and second resin surrounding the second particles and being made of material different from material of the first resin.

A device comprises a first superconducting quantum bit, a second superconducting quantum bit, and a coupler circuit. The first superconducting quantum bit comprises a superconducting tunnel junction and a shunt inductor which form a first superconducting loop. The second superconducting quantum bit comprises a superconducting tunnel junction and a shunt inductor which form a second superconducting loop. The coupler circuit is coupled between the first and second superconducting quantum bits. The coupler circuit is configured to implement an entanglement gate operation between the first and second superconducting quantum bits through exchange interactions between the coupler circuit and the first superconducting quantum bit and the second superconducting quantum bit, when the coupler circuit is driven by a control signal. The coupler circuit is configured to suppress interaction between the first superconducting quantum bit and the second superconducting quantum bit, when the coupler circuit is not driven by the control signal.

A fusion reactor includes a fusion plasma reactor chamber. A magnetic coil structure is disposed inside of the fusion plasma reactor chamber, and a structural component is also disposed inside of the fusion plasma reactor chamber. The structural component couples the magnetic coil structure to the fusion plasma reactor chamber. A superconducting material is disposed at least partially within the structural component. A plurality of cooling channels are disposed at least partially within the structural component. An insulating material is disposed at least partially within the structural component.