In a weak link of two s-wave superconductors (SCs) coupled via a time-reversal-invariant (TRI) topological superconducting (TSC) island, a Josephson current can flow due to Cooper pairs tunneling in and out of spatially separated Majorana Kramers pairs (MKPs), which are doublets of Majorana bound states (MBSs). The sign of the resulting Josephson current is fixed by the joint parity of the four Majorana bound states that make up the MKPs on the TSC island. This parity-controlled Josephson effect can be used as a read-out mechanism for the joint parity in Majorana-based quantum computing. For a TSC island with four terminals, the SC leads can address a Majorana superconducting qubit (MSQ) formed by the charge ground states of the TSC island's terminals. Cooper pair splitting enables single-qubit operations, qubit read-out, as well as two-qubit entangling gates. Hence, TSC islands between SC leads may provide an alternative approach to superconducting quantum computation.

Disclosed is a method for the manufacture of a CEM device comprising forming a thin film of a correlated electron material having a predetermined electrical impedance when the CEM device in its relatively conductive (low impedance) state, wherein the forming of the CEM thin film comprises forming a d- or f-block metal or metal compound doped by a physical or chemical vapour deposition with a predetermined amount of a dopant comprising a back-donating ligand for the metal.

Subject matter herein disclosed relates to a method for the manufacture of a switching device comprising a correlated electron material. In embodiments, processes are described which may be useful for avoiding a resistive layer which tends to form between the correlated electron material and a conductive substrate and/or overlay.

Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, precursors, in a gaseous form, may be utilized in a chamber to build a film of correlated electron materials comprising various impedance characteristics.

Fabricating a steep-switch transistor includes receiving a semiconductor structure including a substrate, a fin disposed on the substrate, a source/drain disposed on the substrate adjacent to the fin, a gate disposed upon the fin, a cap disposed on the gate, a trench contact formed on and in contact with the source/drain, and a source/drain contact formed on an in contact with the trench contact. A recess is formed in a portion of the source/drain contact using a recess patterning process. A bi-stable resistive system (BRS) material is deposited in the recess in contact with the portion of the source/drain contact. A metallization layer is formed in contact upon the BRS material, a portion of the source/drain contact, the BRS material, and a portion of the metallization layer contact forming a reversible switch.

Subject matter disclosed herein may relate to programmable current for correlated electron switches.

Subject matter disclosed herein may relate to fabrication of correlated electron materials used, for example, to perform a switching function. In embodiments, processes are described, which may be useful in avoiding formation of a potentially resistive oxide layer at an interfacial surface between a conductive substrate, for example, and a correlated electron material.

A piezoresistive transistor device includes a first transistor cell having a first piezoelectric material body and a first piezoresistive material body arranged in a stacked configuration. A first electrical resistance of the first piezoresistive material body is dependent upon a voltage applied across the first piezoelectric material body by way of a pressure applied by the first piezoelectric material body to the first piezoresistive material body. A second transistor cell includes a second piezoelectric material body and a second piezoresistive material body arranged in a stacked configuration. A second electrical resistance of the second piezoresistive material body is dependent upon a voltage applied across the second piezoelectric material body by way of a pressure applied by the second piezoelectric material body to the second piezoresistive material body. An internal electrical interconnect is configured to electrically connect the first electrical resistance and the second electrical resistance in series or in parallel.

Provided is a monolithic metal-insulator transition device. The monolithic metal-insulator transition device includes a substrate including a driving region and a switching region, first and second source/drain regions on the driving region, a gate electrode between the first and second source/drain regions, an inlet well region formed adjacent to an upper surface of the substrate on the switching region, a control well region having a different conductivity type from the inlet well region between the inlet well region and a lower surface of the substrate, a first wiring electrically connecting the first source/drain region and the control well region, and a second wiring electrically connecting the second source/drain region and the inlet well region.

Subject matter disclosed herein may relate to programmable current for correlated electron switches.