H10N99/05

Amorphous superconducting alloys for superconducting circuits

Techniques facilitating formation of amorphous superconducting alloys for superconducting circuits are provided. A device can comprise one or more superconducting components that comprise an amorphous superconducting alloy comprising two or more elements. At least one element of the two or more elements is a superconducting element.

Quantum dot light emitting element including water/alcohol soluble conjugated polymer based electron injection/electron transporting layer, manufacturing method thereof and liquid crystal display device

The present invention provides a quantum dot light emitting element, a manufacture method thereof and a liquid crystal display device. The quantum dot light emitting element comprises a substrate, an anode, a Hole Injection and Hole Transporting Layer, a quantum dot light emitting layer, an Electron Injection and Electron Transporting layer and a cathode, and the anode is located on the substrate, and the anode and the cathode are located at the same side of the substrate, and are opposite and separately located, and the Hole Injection and Hole Transporting Layer, the quantum dot light emitting layer and the Electron Injection and Electron Transporting layer are sequentially sandwiched between the anode and the cathode, and one surface of the Hole Injection and Hole Transporting Layer is connected with the anode, wherein the Electron Injection and Electron Transporting layer comprises water/alcohol soluble conjugated polymer.

EMBEDDING OF A CONDENSED MATTER SYSTEM WITH AN ANALOG PROCESSOR
20180218280 · 2018-08-02 ·

A system and method of operation embeds a three-dimensional structure in a topology of an analog processor, for example a quantum processor. The analog processor may include a plurality of qubits arranged in tiles or cells. A number of qubits and communicatively coupled as logical qubits, each logical qubit which span across a plurality of tiles or cells of the qubits. Communicatively coupling between qubits of any given logical qubit can be implemented via application or assignment of a first ferromagnetic coupling strength to each of a number of couplers that communicatively couple the respective qubits in the logical qubit. Other ferromagnetic coupling strengths can be applied or assigned to couplers that communicatively couple qubits that are not part of the logical qubit. The first ferromagnetic coupling strength may be substantially higher than the other ferromagnetic coupling strengths.

METHOD FOR MANUFACTURING SECONDARY CELL
20180182959 · 2018-06-28 ·

A method for manufacturing a secondary cell, the secondary cell including a charging layer that captures electrons by forming energy levels in a band gap by causing a photoexcited structural change in an n-type metal oxide semiconductor coated with an insulating material, includes: a coating step to coat a liquid so as to form a coating film that includes constituents that will form the charging layer; a drying step to dry the coating liquid coated in the coating step; a UV irradiating step to form a UV-irradiated coating film by irradiating the dried coating film obtained through the drying step with ultraviolet light; and a burning step to burn a plurality of the UV-irradiated coating films, after forming the plurality of UV-irradiated coating films by repeating a set plural times, the set including the coating step, the drying step, and the UV irradiating step.

BATTERY AND METHOD OF CHARGING AND DISCHARGING THE SAME
20180175293 · 2018-06-21 ·

A battery having desired characteristics and a method of charging and discharging a battery are provided. A battery according to an embodiment of the present invention includes: a first electrode layer (6); a second electrode layer (7); and a charging layer (3) including an n-type metal oxide semiconductor and an insulating material, a charge voltage generated between the first electrode layer (6) and the second electrode layer (7) being applied to the charging layer (3). On a surface of the charging layer (3), a region in which the second electrode layer (7) is formed is sandwiched between regions in which the second electrode layer (7) is not formed.

Semiconductor nanocrystals and methods of preparation

A method for preparing semiconductor nanocrystals is disclosed. The method comprises adding a precursor mixture comprising one or more cation precursors, one or more anion precursors, and one or more amines to a ligand mixture including one or more acids, one or more phenol compounds, and a solvent to form a reaction mixture, wherein the molar ratio of (the one or more phenol compounds plus the one or more acids plus the one or more amine compounds) to the one or more cations initially included in the reaction mixture is greater than or equal to about 6, and heating the reaction mixture at a temperature and for a period of time sufficient to produce semiconductor nanocrystals having a predetermined composition. Methods for forming a buffer layer and/or an overcoating layer thereover are also disclosed. Semiconductor nanocrystals and compositions including semiconductor nanocrystals of the invention are also disclosed. In certain embodiments, a semiconductor nanocrystal includes one or more Group IIIA and one or more Group VA elements.

INTERCONNECT STRUCTURE AND METHOD FOR ON-CHIP INFORMATION TRANSFER

An interconnect structure for on-chip information transfer, and a method for on-chip information transfer. The interconnect structure comprises a source configured for electrically generating plasmons; a detector configured for electrically detecting the generated plasmons; and a plasmonic waveguide coupled between the source and the detector.

Tunable near-infrared emitters and methods

The present invention relates to near-infrared quantum emitters, and in particular carbon nanostructures with chemically incorporated fluorescent defects, and methods of synthesizing near-infrared emitting nanostructures.

OPTICAL SENSOR

An optical sensor is disclosed. The optical sensor may include a substrate, a topological insulator layer formed on the substrate, an oxide layer formed on the topological insulator layer, a graphene layer stacked on the oxide layer, and a dielectric layer covering the graphene layer.

QUBIT ARRAY REPARATION
20240371967 · 2024-11-07 ·

A qubit array reparation system includes a reservoir of ultra-cold particle, a detector that determines whether or not qubit sites of a qubit array include respective qubit particles, and a transport system for transporting an ultra-cold particle to a first qubit array site that has been determined by the probe system to not include a qubit particle so that the ultra-cold particle can serve as a qubit particle for the first qubit array site. A qubit array reparation process includes maintaining a reservoir of ultra-cold particles, determining whether or not qubit-array sites contain respective qubit particles, each qubit particle having a respective superposition state, and, in response to a determination that a first qubit site does not contain a respective qubit particle, transporting an ultracold particle to the first qubit site to serve as a qubit particle contained by the first qubit site.